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thermal: qcom-spmi-temp-alarm: add support for LITE PMIC peripherals
Add support for TEMP_ALARM LITE PMIC peripherals. This subtype utilizes a pair of registers to configure a warning interrupt threshold temperature and an automatic hardware shutdown threshold temperature. Change-Id: I9a225eb6f3471d834ef0fa99c2d87361eb14759d Signed-off-by: David Collins <quic_collinsd@quicinc.com>
This commit is contained in:
David Collins
parent
733bf2f5f0
commit
4e2be1934f
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@ -2,6 +2,7 @@
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/*
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* Copyright (c) 2011-2015, 2017, 2020-2021, The Linux Foundation.
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* All rights reserved.
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* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <linux/bitops.h>
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@ -23,21 +24,28 @@
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#define QPNP_TM_REG_TYPE 0x04
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#define QPNP_TM_REG_SUBTYPE 0x05
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#define QPNP_TM_REG_STATUS 0x08
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#define QPNP_TM_REG_IRQ_STATUS 0x10
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#define QPNP_TM_REG_SHUTDOWN_CTRL1 0x40
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#define QPNP_TM_REG_ALARM_CTRL 0x46
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/* TEMP_DAC_* registers are only present for TEMP_GEN2 v2.0 */
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#define QPNP_TM_REG_TEMP_DAC_STG1 0x47
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#define QPNP_TM_REG_TEMP_DAC_STG2 0x48
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#define QPNP_TM_REG_TEMP_DAC_STG3 0x49
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#define QPNP_TM_REG_LITE_TEMP_CFG1 0x50
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#define QPNP_TM_REG_LITE_TEMP_CFG2 0x51
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#define QPNP_TM_TYPE 0x09
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#define QPNP_TM_SUBTYPE_GEN1 0x08
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#define QPNP_TM_SUBTYPE_GEN2 0x09
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#define QPNP_TM_SUBTYPE_LITE 0xC0
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#define STATUS_GEN1_STAGE_MASK GENMASK(1, 0)
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#define STATUS_GEN2_STATE_MASK GENMASK(6, 4)
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#define STATUS_GEN2_STATE_SHIFT 4
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/* IRQ status only needed for TEMP_ALARM_LITE */
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#define IRQ_STATUS_MASK BIT(0)
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#define SHUTDOWN_CTRL1_OVERRIDE_S2 BIT(6)
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#define SHUTDOWN_CTRL1_THRESHOLD_MASK GENMASK(1, 0)
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@ -45,6 +53,8 @@
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#define ALARM_CTRL_FORCE_ENABLE BIT(7)
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#define LITE_TEMP_CFG_THRESHOLD_MASK GENMASK(3, 2)
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#define THRESH_COUNT 4
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#define STAGE_COUNT 3
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@ -89,6 +99,19 @@ static const long temp_dac_max[STAGE_COUNT] = {
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119375, 159375, 159375
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};
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/*
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* TEMP_ALARM_LITE has two stages: warning and shutdown with independently
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* configured threshold temperatures.
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*/
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static const long temp_map_lite_warning[THRESH_COUNT] = {
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115000, 125000, 135000, 145000
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};
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static const long temp_map_lite_shutdown[THRESH_COUNT] = {
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135000, 145000, 160000, 175000
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};
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/* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
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#define DEFAULT_TEMP 37000
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@ -145,7 +168,7 @@ static int qpnp_tm_write(struct qpnp_tm_chip *chip, u16 addr, u8 data)
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*/
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static long qpnp_tm_decode_temp(struct qpnp_tm_chip *chip, unsigned int stage)
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{
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if (chip->has_temp_dac) {
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if (chip->has_temp_dac || chip->subtype == QPNP_TM_SUBTYPE_LITE) {
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if (stage == 0 || stage > STAGE_COUNT)
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return 0;
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@ -163,19 +186,26 @@ static long qpnp_tm_decode_temp(struct qpnp_tm_chip *chip, unsigned int stage)
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* qpnp_tm_get_temp_stage() - return over-temperature stage
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* @chip: Pointer to the qpnp_tm chip
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*
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* Return: stage (GEN1) or state (GEN2) on success, or errno on failure.
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* Return: stage (GEN1), state (GEN2), or alarm interrupt state (LITE) on
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* success; or errno on failure.
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*/
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static int qpnp_tm_get_temp_stage(struct qpnp_tm_chip *chip)
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{
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int ret;
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u16 addr = QPNP_TM_REG_STATUS;
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u8 reg = 0;
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ret = qpnp_tm_read(chip, QPNP_TM_REG_STATUS, ®);
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if (chip->subtype == QPNP_TM_SUBTYPE_LITE)
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addr = QPNP_TM_REG_IRQ_STATUS;
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ret = qpnp_tm_read(chip, addr, ®);
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if (ret < 0)
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return ret;
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if (chip->subtype == QPNP_TM_SUBTYPE_GEN1)
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ret = reg & STATUS_GEN1_STAGE_MASK;
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else if (chip->subtype == QPNP_TM_SUBTYPE_LITE)
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ret = reg & IRQ_STATUS_MASK;
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else
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ret = (reg & STATUS_GEN2_STATE_MASK) >> STATUS_GEN2_STATE_SHIFT;
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@ -198,7 +228,8 @@ static int qpnp_tm_update_temp_no_adc(struct qpnp_tm_chip *chip)
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return ret;
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stage = ret;
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if (chip->subtype == QPNP_TM_SUBTYPE_GEN1) {
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if (chip->subtype == QPNP_TM_SUBTYPE_GEN1
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|| chip->subtype == QPNP_TM_SUBTYPE_LITE) {
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stage_new = stage;
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stage_old = chip->stage;
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} else {
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@ -281,6 +312,78 @@ static int qpnp_tm_set_temp_dac_thresh(struct qpnp_tm_chip *chip, int trip,
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return 0;
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}
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static int qpnp_tm_set_temp_lite_thresh(struct qpnp_tm_chip *chip, int trip,
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int temp)
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{
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int ret, temp_cfg, i;
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const long *temp_map;
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u16 addr;
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u8 reg, thresh;
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if (trip < 0 || trip >= STAGE_COUNT) {
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dev_err(chip->dev, "invalid TEMP_LITE trip = %d\n", trip);
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return -EINVAL;
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}
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switch (trip) {
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case 0:
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temp_map = temp_map_lite_warning;
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addr = QPNP_TM_REG_LITE_TEMP_CFG1;
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break;
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case 1:
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/*
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* The second trip point is purely in software to facilitate
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* a controlled shutdown after the warning threshold is crossed
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* but before the automatic hardware shutdown threshold is
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* crossed.
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*/
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return 0;
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case 2:
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temp_map = temp_map_lite_shutdown;
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addr = QPNP_TM_REG_LITE_TEMP_CFG2;
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break;
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default:
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return 0;
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}
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if (temp < temp_map[THRESH_MIN] || temp > temp_map[THRESH_MAX]) {
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dev_err(chip->dev, "invalid TEMP_LITE temp = %d\n", temp);
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return -EINVAL;
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}
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thresh = 0;
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temp_cfg = temp_map[thresh];
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for (i = THRESH_MAX; i >= THRESH_MIN; i--) {
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if (temp >= temp_map[i]) {
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thresh = i;
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temp_cfg = temp_map[i];
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break;
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}
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}
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if (temp_cfg == chip->temp_dac_map[trip])
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return 0;
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ret = qpnp_tm_read(chip, addr, ®);
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if (ret < 0) {
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dev_err(chip->dev, "LITE_TEMP_CFG read failed, ret=%d\n", ret);
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return ret;
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}
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reg &= ~LITE_TEMP_CFG_THRESHOLD_MASK;
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reg |= FIELD_PREP(LITE_TEMP_CFG_THRESHOLD_MASK, thresh);
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ret = qpnp_tm_write(chip, addr, reg);
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if (ret < 0) {
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dev_err(chip->dev, "LITE_TEMP_CFG write failed, ret=%d\n", ret);
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return ret;
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}
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chip->temp_dac_map[trip] = temp_cfg;
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return 0;
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}
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static int qpnp_tm_update_critical_trip_temp(struct qpnp_tm_chip *chip,
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int temp)
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{
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@ -385,6 +488,23 @@ static const struct thermal_zone_of_device_ops qpnp_tm_sensor_temp_dac_ops = {
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.set_trip_temp = qpnp_tm_set_temp_dac_trip_temp,
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};
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static int qpnp_tm_set_temp_lite_trip_temp(void *data, int trip, int temp)
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{
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struct qpnp_tm_chip *chip = data;
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int ret;
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mutex_lock(&chip->lock);
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ret = qpnp_tm_set_temp_lite_thresh(chip, trip, temp);
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mutex_unlock(&chip->lock);
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return ret;
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}
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static const struct thermal_zone_of_device_ops qpnp_tm_sensor_temp_lite_ops = {
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.get_temp = qpnp_tm_get_temp,
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.set_trip_temp = qpnp_tm_set_temp_lite_trip_temp,
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};
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static irqreturn_t qpnp_tm_isr(int irq, void *data)
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{
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struct qpnp_tm_chip *chip = data;
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@ -471,6 +591,71 @@ static int qpnp_tm_temp_dac_init(struct qpnp_tm_chip *chip)
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return 0;
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}
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/* Configure TEMP_LITE registers based on DT thermal_zone trips */
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static int qpnp_tm_temp_lite_update_trip_temps(struct qpnp_tm_chip *chip)
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{
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const struct thermal_trip *trips;
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int ret, ntrips, i;
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ntrips = of_thermal_get_ntrips(chip->tz_dev);
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/* Keep hardware defaults if no DT trips are defined. */
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if (ntrips <= 0)
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return 0;
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trips = of_thermal_get_trip_points(chip->tz_dev);
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if (!trips)
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return -EINVAL;
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for (i = 0; i < ntrips; i++) {
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if (of_thermal_is_trip_valid(chip->tz_dev, i)) {
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ret = qpnp_tm_set_temp_lite_thresh(chip, i,
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trips[i].temperature);
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if (ret < 0)
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return ret;
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}
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}
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/* Verify that trips are strictly increasing. */
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if (chip->temp_dac_map[2] <= chip->temp_dac_map[0]) {
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dev_err(chip->dev, "Threshold 2=%ld <= threshold 0=%ld\n",
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chip->temp_dac_map[2], chip->temp_dac_map[0]);
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return -EINVAL;
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}
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return 0;
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}
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/* Read the hardware default TEMP_LITE stage threshold temperatures */
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static int qpnp_tm_temp_lite_init(struct qpnp_tm_chip *chip)
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{
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int ret, thresh;
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u8 reg = 0;
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/*
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* Store the warning trip temp in temp_dac_map[0] and the shutdown trip
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* temp in temp_dac_map[2]. The second trip point is purely in software
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* to facilitate a controlled shutdown after the warning threshold is
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* crossed but before the automatic hardware shutdown threshold is
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* crossed. Thus, there is no register to read for the second trip
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* point.
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*/
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ret = qpnp_tm_read(chip, QPNP_TM_REG_LITE_TEMP_CFG1, ®);
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if (ret < 0)
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return ret;
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thresh = FIELD_GET(LITE_TEMP_CFG_THRESHOLD_MASK, reg);
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chip->temp_dac_map[0] = temp_map_lite_warning[thresh];
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ret = qpnp_tm_read(chip, QPNP_TM_REG_LITE_TEMP_CFG2, ®);
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if (ret < 0)
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return ret;
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thresh = FIELD_GET(LITE_TEMP_CFG_THRESHOLD_MASK, reg);
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chip->temp_dac_map[2] = temp_map_lite_shutdown[thresh];
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return 0;
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}
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/*
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* This function initializes the internal temp value based on only the
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* current thermal stage and threshold. Setup threshold control and
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@ -497,13 +682,18 @@ static int qpnp_tm_init(struct qpnp_tm_chip *chip)
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goto out;
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chip->stage = ret;
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stage = chip->subtype == QPNP_TM_SUBTYPE_GEN1
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? chip->stage : alarm_state_map[chip->stage];
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stage = (chip->subtype == QPNP_TM_SUBTYPE_GEN1
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|| chip->subtype == QPNP_TM_SUBTYPE_LITE)
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? chip->stage : alarm_state_map[chip->stage];
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if (stage)
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chip->temp = qpnp_tm_decode_temp(chip, stage);
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if (chip->has_temp_dac) {
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if (chip->subtype == QPNP_TM_SUBTYPE_LITE) {
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ret = qpnp_tm_temp_lite_update_trip_temps(chip);
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if (ret < 0)
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goto out;
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} else if (chip->has_temp_dac) {
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ret = qpnp_tm_temp_dac_update_trip_temps(chip);
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if (ret < 0)
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goto out;
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@ -595,7 +785,8 @@ static int qpnp_tm_probe(struct platform_device *pdev)
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chip->dig_revision = (dig_major << 8) | dig_minor;
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if (type != QPNP_TM_TYPE || (subtype != QPNP_TM_SUBTYPE_GEN1
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&& subtype != QPNP_TM_SUBTYPE_GEN2)) {
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&& subtype != QPNP_TM_SUBTYPE_GEN2
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&& subtype != QPNP_TM_SUBTYPE_LITE)) {
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dev_err(&pdev->dev, "invalid type 0x%02x or subtype 0x%02x\n",
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type, subtype);
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return -ENODEV;
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@ -607,7 +798,7 @@ static int qpnp_tm_probe(struct platform_device *pdev)
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chip->has_temp_dac = true;
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else if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major >= 1)
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chip->temp_map = &temp_map_gen2_v1;
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else
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else if (subtype == QPNP_TM_SUBTYPE_GEN1)
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chip->temp_map = &temp_map_gen1;
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if (chip->has_temp_dac) {
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@ -617,6 +808,13 @@ static int qpnp_tm_probe(struct platform_device *pdev)
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return ret;
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}
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if (chip->subtype == QPNP_TM_SUBTYPE_LITE) {
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ops = &qpnp_tm_sensor_temp_lite_ops;
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ret = qpnp_tm_temp_lite_init(chip);
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if (ret < 0)
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return ret;
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}
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/*
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* Register the sensor before initializing the hardware to be able to
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* read the trip points. get_temp() returns the default temperature
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