net/mlx5: Expose MLX5_UMR_ALIGN definition

Expose HW constant value in a shared header, to be used by core/EN
drivers.

Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260309093435.1850724-10-tariqt@nvidia.com
Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
This commit is contained in:
Tariq Toukan 2026-03-09 11:34:35 +02:00 committed by Leon Romanovsky
parent d6c9b4de81
commit 4dd2115f43
2 changed files with 1 additions and 1 deletions

View File

@ -51,7 +51,6 @@ enum {
};
#define MLX5_MR_CACHE_PERSISTENT_ENTRY_MIN_DESCS 4
#define MLX5_UMR_ALIGN 2048
static void
create_mkey_callback(int status, struct mlx5_async_work *context);

View File

@ -293,6 +293,7 @@ enum {
MLX5_UMR_INLINE = (1 << 7),
};
#define MLX5_UMR_ALIGN (2048)
#define MLX5_UMR_FLEX_ALIGNMENT 0x40
#define MLX5_UMR_MTT_NUM_ENTRIES_ALIGNMENT (MLX5_UMR_FLEX_ALIGNMENT / sizeof(struct mlx5_mtt))
#define MLX5_UMR_KLM_NUM_ENTRIES_ALIGNMENT (MLX5_UMR_FLEX_ALIGNMENT / sizeof(struct mlx5_klm))