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drm/amdgpu/vcn4.0.5: read back register after written
The addition of register read-back in VCN v4.0.5 is intended to prevent potential race conditions. Reviewed-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: David (Ming Qiang) Wu <David.Wu3@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1254,6 +1254,11 @@ static void vcn_v4_0_5_stop_dpg_mode(struct amdgpu_vcn_inst *vinst)
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/* disable dynamic power gating mode */
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WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, regUVD_POWER_STATUS), 0,
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~UVD_POWER_STATUS__UVD_PG_MODE_MASK);
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/* Keeping one read-back to ensure all register writes are done,
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* otherwise it may introduce race conditions.
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*/
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RREG32_SOC15(VCN, inst_idx, regUVD_STATUS);
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}
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/**
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@ -1337,6 +1342,11 @@ static int vcn_v4_0_5_stop(struct amdgpu_vcn_inst *vinst)
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/* enable VCN power gating */
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vcn_v4_0_5_enable_static_power_gating(vinst);
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/* Keeping one read-back to ensure all register writes are done,
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* otherwise it may introduce race conditions.
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*/
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RREG32_SOC15(VCN, i, regUVD_STATUS);
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done:
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if (adev->pm.dpm_enabled)
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amdgpu_dpm_enable_vcn(adev, false, i);
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