github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-29 17:43:52 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

dt-bindings: clock: qcom: Add MSM8937 Global Clock Controller

Browse Source 
Add device tree bindings for the global clock controller on Qualcomm
MSM8937 platform.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Link: https://lore.kernel.org/r/20250903-msm8937-v9-1-a097c91c5801@mainlining.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Barnabás Czémán 2025-09-03 23:08:21 +02:00 committed by Bjorn Andersson
parent 8f5ae30d69
commit 4d32c1f66a
2 changed files with 27 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml
View File

@ -9,16 +9,21 @@ title: Qualcomm Global Clock & Reset Controller on MSM8953
maintainers:
- Adam Skladowski <a_skl39@protonmail.com>
- Sireesh Kodali <sireeshkodali@protonmail.com>
- Barnabas Czeman <barnabas.czeman@mainlining.org>
description: |
Qualcomm global clock control module provides the clocks, resets and power
domains on MSM8953.
domains on MSM8937 or MSM8953.
See also: include/dt-bindings/clock/qcom,gcc-msm8953.h
See also::
include/dt-bindings/clock/qcom,gcc-msm8917.h
include/dt-bindings/clock/qcom,gcc-msm8953.h
properties:
compatible:
const: qcom,gcc-msm8953
enum:
- qcom,gcc-msm8937
- qcom,gcc-msm8953
clocks:
items:

19
include/dt-bindings/clock/qcom,gcc-msm8917.h
View File

@ -170,6 +170,23 @@
#define VFE1_CLK_SRC 163
#define VSYNC_CLK_SRC 164
#define GPLL0_SLEEP_CLK_SRC 165
/* Addtional MSM8937-specific clocks */
#define MSM8937_BLSP1_QUP1_I2C_APPS_CLK_SRC 166
#define MSM8937_BLSP1_QUP1_SPI_APPS_CLK_SRC 167
#define MSM8937_BLSP2_QUP4_I2C_APPS_CLK_SRC 168
#define MSM8937_BLSP2_QUP4_SPI_APPS_CLK_SRC 169
#define MSM8937_BYTE1_CLK_SRC 170
#define MSM8937_ESC1_CLK_SRC 171
#define MSM8937_PCLK1_CLK_SRC 172
#define MSM8937_GCC_BLSP1_QUP1_I2C_APPS_CLK 173
#define MSM8937_GCC_BLSP1_QUP1_SPI_APPS_CLK 174
#define MSM8937_GCC_BLSP2_QUP4_I2C_APPS_CLK 175
#define MSM8937_GCC_BLSP2_QUP4_SPI_APPS_CLK 176
#define MSM8937_GCC_MDSS_BYTE1_CLK 177
#define MSM8937_GCC_MDSS_ESC1_CLK 178
#define MSM8937_GCC_MDSS_PCLK1_CLK 179
#define MSM8937_GCC_OXILI_AON_CLK 180
#define MSM8937_GCC_OXILI_TIMER_CLK 181
/* GCC block resets */
#define GCC_CAMSS_MICRO_BCR 0
@ -187,5 +204,7 @@
#define VENUS_GDSC 5
#define VFE0_GDSC 6
#define VFE1_GDSC 7
/* Additional MSM8937-specific GDSCs */
#define MSM8937_OXILI_CX_GDSC 8
#endif