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Merge c1b4ec85ee ("Merge tag 'x86-mm-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip") into android-mainline
Steps on the way to 5.10-rc1 Change-Id: If433e0fff2f0fbb7110d87456af4bbf29d0117cc Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
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commit
4d1f9d3090
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@ -159,6 +159,4 @@ extern unsigned int ptrs_per_p4d;
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#define PGD_KERNEL_START ((PAGE_SIZE / 2) / sizeof(pgd_t))
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#define ARCH_PAGE_TABLE_SYNC_MASK (pgtable_l5_enabled() ? PGTBL_PGD_MODIFIED : PGTBL_P4D_MODIFIED)
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#endif /* _ASM_X86_PGTABLE_64_DEFS_H */
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@ -217,11 +217,6 @@ static void sync_global_pgds(unsigned long start, unsigned long end)
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sync_global_pgds_l4(start, end);
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}
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void arch_sync_kernel_mappings(unsigned long start, unsigned long end)
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{
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sync_global_pgds(start, end);
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}
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/*
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* NOTE: This function is marked __ref because it calls __init function
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* (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
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@ -1257,14 +1252,19 @@ static void __init preallocate_vmalloc_pages(void)
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if (!p4d)
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goto failed;
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/*
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* With 5-level paging the P4D level is not folded. So the PGDs
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* are now populated and there is no need to walk down to the
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* PUD level.
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*/
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if (pgtable_l5_enabled())
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continue;
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/*
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* The goal here is to allocate all possibly required
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* hardware page tables pointed to by the top hardware
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* level.
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*
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* On 4-level systems, the P4D layer is folded away and
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* the above code does no preallocation. Below, go down
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* to the pud _software_ level to ensure the second
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* hardware level is allocated on 4-level systems too.
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*/
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lvl = "pud";
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pud = pud_alloc(&init_mm, p4d, addr);
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if (!pud)
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