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arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3

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There is a header for a DB9 serial port, but any attempts to use
hardware handshaking fail.  Enable RTS and CTS pin muxing and enable
handshaking in the uart node.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Adam Ford 2022-04-26 15:51:43 -05:00 committed by Shawn Guo
parent 42c1a6f62e
commit 4ce01ce36d
1 changed files with 3 additions and 0 deletions
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3
arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
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@ -278,6 +278,7 @@ &uart3 {
pinctrl-0 = <&pinctrl_uart3>; pinctrl-0 = <&pinctrl_uart3>;
assigned-clocks = <&clk IMX8MM_CLK_UART3>; assigned-clocks = <&clk IMX8MM_CLK_UART3>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };
@ -386,6 +387,8 @@ pinctrl_uart3: uart3grp {
fsl,pins = < fsl,pins = <
MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40 MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40
MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40 MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40
MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x40
MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x40
>; >;
}; };