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ARM: tegra: Configure Tegra114 power domains

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Add power domains found in Tegra114 and configure operating-points-v2 for
supported devices accordingly.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Svyatoslav Ryhel 2026-04-27 10:03:12 +03:00 committed by Thierry Reding
parent 88627b26ba
commit 4cc90d4c04
2 changed files with 1401 additions and 0 deletions
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1275
arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi
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File diff suppressed because it is too large Load Diff

126
arch/arm/boot/dts/nvidia/tegra114.dtsi
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@ -58,6 +58,8 @@ vi@54080000 {
clocks = <&tegra_car TEGRA114_CLK_VI>;
resets = <&tegra_car 20>;
reset-names = "vi";
power-domains = <&pd_venc>;
operating-points-v2 = <&vi_dvfs_opp_table>;
iommus = <&mc TEGRA_SWGROUP_VI>;
@ -71,6 +73,8 @@ epp@540c0000 {
clocks = <&tegra_car TEGRA114_CLK_EPP>;
resets = <&tegra_car TEGRA114_CLK_EPP>;
reset-names = "epp";
power-domains = <&pd_heg>;
operating-points-v2 = <&epp_dvfs_opp_table>;
iommus = <&mc TEGRA_SWGROUP_EPP>;
@ -84,6 +88,7 @@ isp@54100000 {
clocks = <&tegra_car TEGRA114_CLK_ISP>;
resets = <&tegra_car TEGRA114_CLK_ISP>;
reset-names = "isp";
power-domains = <&pd_venc>;
iommus = <&mc TEGRA_SWGROUP_ISP>;
@ -97,6 +102,8 @@ gr2d@54140000 {
clocks = <&tegra_car TEGRA114_CLK_GR2D>;
resets = <&tegra_car 21>, <&mc TEGRA114_MC_RESET_2D>;
reset-names = "2d", "mc";
power-domains = <&pd_heg>;
operating-points-v2 = <&gr2d_dvfs_opp_table>;
iommus = <&mc TEGRA_SWGROUP_G2>;
};
@ -107,6 +114,8 @@ gr3d@54180000 {
clocks = <&tegra_car TEGRA114_CLK_GR3D>;
resets = <&tegra_car 24>, <&mc TEGRA114_MC_RESET_3D>;
reset-names = "3d", "mc";
power-domains = <&pd_3d>;
operating-points-v2 = <&gr3d_dvfs_opp_table>;
iommus = <&mc TEGRA_SWGROUP_NV>;
};
@ -120,6 +129,8 @@ dc@54200000 {
clock-names = "dc", "parent";
resets = <&tegra_car 27>;
reset-names = "dc";
power-domains = <&pd_core>;
operating-points-v2 = <&disp1_dvfs_opp_table>;
iommus = <&mc TEGRA_SWGROUP_DC>;
@ -150,6 +161,8 @@ dc@54240000 {
clock-names = "dc", "parent";
resets = <&tegra_car 26>;
reset-names = "dc";
power-domains = <&pd_core>;
operating-points-v2 = <&disp2_dvfs_opp_table>;
iommus = <&mc TEGRA_SWGROUP_DCB>;
@ -180,6 +193,8 @@ hdmi@54280000 {
clock-names = "hdmi", "parent";
resets = <&tegra_car 51>;
reset-names = "hdmi";
power-domains = <&pd_core>;
operating-points-v2 = <&hdmi_dvfs_opp_table>;
status = "disabled";
};
@ -193,6 +208,7 @@ dsia: dsi@54300000 {
resets = <&tegra_car 48>;
reset-names = "dsi";
nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */
power-domains = <&pd_core>;
status = "disabled";
#address-cells = <1>;
@ -209,6 +225,7 @@ dsib: dsi@54400000 {
resets = <&tegra_car 82>;
reset-names = "dsi";
nvidia,mipi-calibrate = <&mipi 0x180>; /* DSIC & DSID pads */
power-domains = <&pd_core>;
status = "disabled";
#address-cells = <1>;
@ -222,6 +239,8 @@ msenc@544c0000 {
clocks = <&tegra_car TEGRA114_CLK_MSENC>;
resets = <&tegra_car TEGRA114_CLK_MSENC>;
reset-names = "mpe";
power-domains = <&pd_mpe>;
operating-points-v2 = <&msenc_dvfs_opp_table>;
iommus = <&mc TEGRA_SWGROUP_MSENC>;
@ -234,6 +253,8 @@ tsec@54500000 {
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_TSEC>;
resets = <&tegra_car TEGRA114_CLK_TSEC>;
power-domains = <&pd_core>;
operating-points-v2 = <&tsec_dvfs_opp_table>;
iommus = <&mc TEGRA_SWGROUP_TSEC>;
@ -393,6 +414,8 @@ vde@6001a000 {
reset-names = "vde", "mc";
resets = <&tegra_car 61>, <&mc TEGRA114_MC_RESET_VDE>;
iommus = <&mc TEGRA_SWGROUP_VDE>;
power-domains = <&pd_vde>;
operating-points-v2 = <&vde_dvfs_opp_table>;
};
apbmisc@70000800 {
@ -470,6 +493,7 @@ pwm: pwm@7000a000 {
clocks = <&tegra_car TEGRA114_CLK_PWM>;
resets = <&tegra_car 17>;
reset-names = "pwm";
power-domains = <&pd_core>;
status = "disabled";
};
@ -560,6 +584,8 @@ spi@7000d400 {
reset-names = "spi";
dmas = <&apbdma 15>, <&apbdma 15>;
dma-names = "rx", "tx";
power-domains = <&pd_core>;
operating-points-v2 = <&sbc1_dvfs_opp_table>;
status = "disabled";
};
@ -575,6 +601,8 @@ spi@7000d600 {
reset-names = "spi";
dmas = <&apbdma 16>, <&apbdma 16>;
dma-names = "rx", "tx";
power-domains = <&pd_core>;
operating-points-v2 = <&sbc2_dvfs_opp_table>;
status = "disabled";
};
@ -590,6 +618,8 @@ spi@7000d800 {
reset-names = "spi";
dmas = <&apbdma 17>, <&apbdma 17>;
dma-names = "rx", "tx";
power-domains = <&pd_core>;
operating-points-v2 = <&sbc3_dvfs_opp_table>;
status = "disabled";
};
@ -605,6 +635,8 @@ spi@7000da00 {
reset-names = "spi";
dmas = <&apbdma 18>, <&apbdma 18>;
dma-names = "rx", "tx";
power-domains = <&pd_core>;
operating-points-v2 = <&sbc4_dvfs_opp_table>;
status = "disabled";
};
@ -620,6 +652,8 @@ spi@7000dc00 {
reset-names = "spi";
dmas = <&apbdma 27>, <&apbdma 27>;
dma-names = "rx", "tx";
power-domains = <&pd_core>;
operating-points-v2 = <&sbc5_dvfs_opp_table>;
status = "disabled";
};
@ -635,6 +669,8 @@ spi@7000de00 {
reset-names = "spi";
dmas = <&apbdma 28>, <&apbdma 28>;
dma-names = "rx", "tx";
power-domains = <&pd_core>;
operating-points-v2 = <&sbc6_dvfs_opp_table>;
status = "disabled";
};
@ -661,6 +697,86 @@ tegra_pmc: pmc@7000e400 {
clocks = <&tegra_car TEGRA114_CLK_PCLK>, <&clk32k_in>;
clock-names = "pclk", "clk32k_in";
#clock-cells = <1>;
pd_core: core-domain {
#power-domain-cells = <0>;
operating-points-v2 = <&core_opp_table>;
};
powergates {
/*
* TODO: Add DIS and DISB domains once DC is able
* to handle them properly. VENC and DISB should
* set DIS as their source power domain due to
* internal dependency.
*/
pd_heg: heg {
clocks = <&tegra_car TEGRA114_CLK_GR2D>,
<&tegra_car TEGRA114_CLK_EPP>;
resets = <&mc TEGRA114_MC_RESET_2D>,
<&mc TEGRA114_MC_RESET_EPP>,
<&tegra_car TEGRA114_CLK_GR2D>,
<&tegra_car TEGRA114_CLK_EPP>;
power-domains = <&pd_core>;
#power-domain-cells = <0>;
};
pd_mpe: mpe {
clocks = <&tegra_car TEGRA114_CLK_MSENC>;
resets = <&mc TEGRA114_MC_RESET_MPE>,
<&tegra_car TEGRA114_CLK_MSENC>;
power-domains = <&pd_core>;
#power-domain-cells = <0>;
};
pd_3d: td {
clocks = <&tegra_car TEGRA114_CLK_GR3D>;
resets = <&mc TEGRA114_MC_RESET_3D>,
<&tegra_car TEGRA114_CLK_GR3D>;
power-domains = <&pd_core>;
#power-domain-cells = <0>;
};
pd_vde: vdec {
clocks = <&tegra_car TEGRA114_CLK_VDE>;
resets = <&mc TEGRA114_MC_RESET_VDE>,
<&tegra_car TEGRA114_CLK_VDE>;
power-domains = <&pd_core>;
#power-domain-cells = <0>;
};
pd_venc: venc {
clocks = <&tegra_car TEGRA114_CLK_ISP>,
<&tegra_car TEGRA114_CLK_VI>,
<&tegra_car TEGRA114_CLK_CSI>;
resets = <&mc TEGRA114_MC_RESET_ISP>,
<&mc TEGRA114_MC_RESET_VI>,
<&tegra_car TEGRA114_CLK_ISP>,
<&tegra_car 20 /* VI */>,
<&tegra_car TEGRA114_CLK_CSI>;
power-domains = <&pd_core>;
#power-domain-cells = <0>;
};
pd_xusbss: xusba {
clocks = <&tegra_car TEGRA114_CLK_XUSB_SS>;
resets = <&tegra_car TEGRA114_CLK_XUSB_SS>;
#power-domain-cells = <0>;
};
pd_xusbdev: xusbb {
clocks = <&tegra_car TEGRA114_CLK_XUSB_DEV>;
resets = <&tegra_car 95>;
#power-domain-cells = <0>;
};
pd_xusbhost: xusbc {
clocks = <&tegra_car TEGRA114_CLK_XUSB_HOST>;
resets = <&tegra_car TEGRA114_CLK_XUSB_HOST>;
#power-domain-cells = <0>;
};
};
};
fuse@7000f800 {
@ -670,6 +786,7 @@ fuse@7000f800 {
clock-names = "fuse";
resets = <&tegra_car 39>;
reset-names = "fuse";
power-domains = <&pd_core>;
};
mc: memory-controller@70019000 {
@ -691,6 +808,7 @@ emc: external-memory-controller@7001b000 {
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_EMC>;
clock-names = "emc";
power-domains = <&pd_core>;
nvidia,memory-controller = <&mc>;
operating-points-v2 = <&emc_icc_dvfs_opp_table>;
@ -885,6 +1003,8 @@ mmc@78000000 {
clock-names = "sdhci";
resets = <&tegra_car 14>;
reset-names = "sdhci";
power-domains = <&pd_core>;
operating-points-v2 = <&sdmmc1_dvfs_opp_table>;
status = "disabled";
};
@ -907,6 +1027,8 @@ mmc@78000400 {
clock-names = "sdhci";
resets = <&tegra_car 69>;
reset-names = "sdhci";
power-domains = <&pd_core>;
operating-points-v2 = <&sdmmc3_dvfs_opp_table>;
status = "disabled";
};
@ -918,6 +1040,8 @@ mmc@78000600 {
clock-names = "sdhci";
resets = <&tegra_car 15>;
reset-names = "sdhci";
power-domains = <&pd_core>;
operating-points-v2 = <&sdmmc4_dvfs_opp_table>;
status = "disabled";
};
@ -930,6 +1054,7 @@ usb@7d000000 {
resets = <&tegra_car 22>;
reset-names = "usb";
nvidia,phy = <&phy1>;
power-domains = <&pd_core>;
status = "disabled";
};
@ -970,6 +1095,7 @@ usb@7d008000 {
resets = <&tegra_car 59>;
reset-names = "usb";
nvidia,phy = <&phy3>;
power-domains = <&pd_core>;
status = "disabled";
};