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iio: pressure: bmp280: Add data ready trigger support
The BMP3xx and BMP5xx sensors have an interrupt pin which can be used as a trigger for when there are data ready in the sensor for pick up. This use case is used along with NORMAL_MODE in the sensor, which allows the sensor to do consecutive measurements depending on the ODR rate value. The trigger pin can be configured to be open-drain or push-pull and either rising or falling edge. No support is added yet for interrupts for FIFO, WATERMARK and out of range values. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Link: https://patch.msgid.link/20241017233022.238250-4-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Vasileios Amoiridis
Jonathan Cameron
parent
87e1fbd135
commit
4c5e83b232
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@ -42,12 +42,14 @@
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#include <linux/module.h>
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#include <linux/nvmem-provider.h>
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#include <linux/pm_runtime.h>
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#include <linux/property.h>
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#include <linux/random.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/trigger.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/triggered_buffer.h>
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@ -1280,6 +1282,63 @@ static irqreturn_t bme280_trigger_handler(int irq, void *p)
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return IRQ_HANDLED;
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}
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static int __bmp280_trigger_probe(struct iio_dev *indio_dev,
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const struct iio_trigger_ops *trigger_ops,
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int (*int_pin_config)(struct bmp280_data *data),
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irq_handler_t irq_thread_handler)
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{
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struct bmp280_data *data = iio_priv(indio_dev);
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struct device *dev = data->dev;
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u32 irq_type;
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int ret, irq;
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irq = fwnode_irq_get(dev_fwnode(dev), 0);
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if (irq < 0)
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return dev_err_probe(dev, irq, "No interrupt found.\n");
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irq_type = irq_get_trigger_type(irq);
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switch (irq_type) {
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case IRQF_TRIGGER_RISING:
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data->trig_active_high = true;
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break;
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case IRQF_TRIGGER_FALLING:
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data->trig_active_high = false;
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break;
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default:
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return dev_err_probe(dev, -EINVAL, "Invalid interrupt type specified.\n");
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}
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data->trig_open_drain =
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fwnode_property_read_bool(dev_fwnode(dev), "int-open-drain");
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ret = int_pin_config(data);
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if (ret)
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return ret;
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data->trig = devm_iio_trigger_alloc(data->dev, "%s-dev%d",
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indio_dev->name,
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iio_device_id(indio_dev));
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if (!data->trig)
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return -ENOMEM;
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data->trig->ops = trigger_ops;
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iio_trigger_set_drvdata(data->trig, data);
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ret = devm_request_threaded_irq(data->dev, irq, NULL,
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irq_thread_handler, IRQF_ONESHOT,
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indio_dev->name, indio_dev);
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if (ret)
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return dev_err_probe(dev, ret, "request IRQ failed.\n");
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ret = devm_iio_trigger_register(data->dev, data->trig);
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if (ret)
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return dev_err_probe(dev, ret, "iio trigger register failed.\n");
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indio_dev->trig = iio_trigger_get(data->trig);
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return 0;
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}
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static const u8 bme280_chip_ids[] = { BME280_CHIP_ID };
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static const int bme280_humid_coeffs[] = { 1000, 1024 };
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@ -1774,6 +1833,67 @@ static int bmp380_chip_config(struct bmp280_data *data)
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return ret;
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}
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static int bmp380_data_rdy_trigger_set_state(struct iio_trigger *trig,
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bool state)
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{
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struct bmp280_data *data = iio_trigger_get_drvdata(trig);
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int ret;
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guard(mutex)(&data->lock);
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ret = regmap_update_bits(data->regmap, BMP380_REG_INT_CONTROL,
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BMP380_INT_CTRL_DRDY_EN,
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FIELD_PREP(BMP380_INT_CTRL_DRDY_EN, !!state));
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if (ret)
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dev_err(data->dev,
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"Could not %s interrupt.\n", str_enable_disable(state));
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return ret;
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}
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static const struct iio_trigger_ops bmp380_trigger_ops = {
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.set_trigger_state = &bmp380_data_rdy_trigger_set_state,
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};
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static int bmp380_int_pin_config(struct bmp280_data *data)
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{
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int pin_drive_cfg = FIELD_PREP(BMP380_INT_CTRL_OPEN_DRAIN,
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data->trig_open_drain);
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int pin_level_cfg = FIELD_PREP(BMP380_INT_CTRL_LEVEL,
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data->trig_active_high);
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int ret, int_pin_cfg = pin_drive_cfg | pin_level_cfg;
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ret = regmap_update_bits(data->regmap, BMP380_REG_INT_CONTROL,
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BMP380_INT_CTRL_SETTINGS_MASK, int_pin_cfg);
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if (ret)
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dev_err(data->dev, "Could not set interrupt settings.\n");
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return ret;
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}
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static irqreturn_t bmp380_irq_thread_handler(int irq, void *p)
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{
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struct iio_dev *indio_dev = p;
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struct bmp280_data *data = iio_priv(indio_dev);
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unsigned int int_ctrl;
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int ret;
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ret = regmap_read(data->regmap, BMP380_REG_INT_STATUS, &int_ctrl);
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if (ret)
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return IRQ_NONE;
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if (FIELD_GET(BMP380_INT_STATUS_DRDY, int_ctrl))
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iio_trigger_poll_nested(data->trig);
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return IRQ_HANDLED;
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}
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static int bmp380_trigger_probe(struct iio_dev *indio_dev)
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{
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return __bmp280_trigger_probe(indio_dev, &bmp380_trigger_ops,
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bmp380_int_pin_config,
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bmp380_irq_thread_handler);
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}
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static irqreturn_t bmp380_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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@ -1871,6 +1991,7 @@ const struct bmp280_chip_info bmp380_chip_info = {
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.wait_conv = bmp380_wait_conv,
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.preinit = bmp380_preinit,
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.trigger_probe = bmp380_trigger_probe,
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.trigger_handler = bmp380_trigger_handler,
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};
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EXPORT_SYMBOL_NS(bmp380_chip_info, IIO_BMP280);
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@ -2413,6 +2534,74 @@ static int bmp580_chip_config(struct bmp280_data *data)
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return 0;
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}
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static int bmp580_data_rdy_trigger_set_state(struct iio_trigger *trig,
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bool state)
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{
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struct bmp280_data *data = iio_trigger_get_drvdata(trig);
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int ret;
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guard(mutex)(&data->lock);
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ret = regmap_update_bits(data->regmap, BMP580_REG_INT_CONFIG,
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BMP580_INT_CONFIG_INT_EN,
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FIELD_PREP(BMP580_INT_CONFIG_INT_EN, !!state));
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if (ret)
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dev_err(data->dev,
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"Could not %s interrupt.\n", str_enable_disable(state));
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return ret;
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}
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static const struct iio_trigger_ops bmp580_trigger_ops = {
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.set_trigger_state = &bmp580_data_rdy_trigger_set_state,
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};
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static int bmp580_int_pin_config(struct bmp280_data *data)
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{
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int pin_drive_cfg = FIELD_PREP(BMP580_INT_CONFIG_OPEN_DRAIN,
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data->trig_open_drain);
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int pin_level_cfg = FIELD_PREP(BMP580_INT_CONFIG_LEVEL,
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data->trig_active_high);
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int ret, int_pin_cfg = pin_drive_cfg | pin_level_cfg;
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ret = regmap_update_bits(data->regmap, BMP580_REG_INT_CONFIG,
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BMP580_INT_CONFIG_MASK, int_pin_cfg);
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if (ret) {
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dev_err(data->dev, "Could not set interrupt settings.\n");
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return ret;
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}
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ret = regmap_set_bits(data->regmap, BMP580_REG_INT_SOURCE,
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BMP580_INT_SOURCE_DRDY);
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if (ret)
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dev_err(data->dev, "Could not set interrupt source.\n");
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return ret;
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}
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static irqreturn_t bmp580_irq_thread_handler(int irq, void *p)
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{
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struct iio_dev *indio_dev = p;
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struct bmp280_data *data = iio_priv(indio_dev);
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unsigned int int_ctrl;
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int ret;
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ret = regmap_read(data->regmap, BMP580_REG_INT_STATUS, &int_ctrl);
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if (ret)
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return IRQ_NONE;
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if (FIELD_GET(BMP580_INT_STATUS_DRDY_MASK, int_ctrl))
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iio_trigger_poll_nested(data->trig);
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return IRQ_HANDLED;
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}
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static int bmp580_trigger_probe(struct iio_dev *indio_dev)
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{
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return __bmp280_trigger_probe(indio_dev, &bmp580_trigger_ops,
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bmp580_int_pin_config,
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bmp580_irq_thread_handler);
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}
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static irqreturn_t bmp580_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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@ -2493,6 +2682,7 @@ const struct bmp280_chip_info bmp580_chip_info = {
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.wait_conv = bmp580_wait_conv,
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.preinit = bmp580_preinit,
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.trigger_probe = bmp580_trigger_probe,
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.trigger_handler = bmp580_trigger_handler,
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};
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EXPORT_SYMBOL_NS(bmp580_chip_info, IIO_BMP280);
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@ -3041,8 +3231,11 @@ int bmp280_common_probe(struct device *dev,
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* however as it happens, the BMP085 shares the chip ID of BMP180
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* so we look for an IRQ if we have that.
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*/
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if (irq > 0 && (chip_id == BMP180_CHIP_ID)) {
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ret = bmp085_fetch_eoc_irq(dev, name, irq, data);
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if (irq > 0) {
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if (chip_id == BMP180_CHIP_ID)
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ret = bmp085_fetch_eoc_irq(dev, name, irq, data);
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if (data->chip_info->trigger_probe)
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ret = data->chip_info->trigger_probe(indio_dev);
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if (ret)
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return ret;
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}
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@ -55,8 +55,17 @@
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#define BMP580_CMD_NVM_WRITE_SEQ_1 0xA0
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#define BMP580_CMD_SOFT_RESET 0xB6
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#define BMP580_INT_STATUS_DRDY_MASK BIT(0)
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#define BMP580_INT_STATUS_POR_MASK BIT(4)
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#define BMP580_INT_SOURCE_DRDY BIT(0)
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#define BMP580_INT_CONFIG_MASK GENMASK(3, 0)
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#define BMP580_INT_CONFIG_LATCH BIT(0)
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#define BMP580_INT_CONFIG_LEVEL BIT(1)
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#define BMP580_INT_CONFIG_OPEN_DRAIN BIT(2)
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#define BMP580_INT_CONFIG_INT_EN BIT(3)
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#define BMP580_STATUS_CORE_RDY_MASK BIT(0)
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#define BMP580_STATUS_NVM_RDY_MASK BIT(1)
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#define BMP580_STATUS_NVM_ERR_MASK BIT(2)
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@ -175,6 +184,14 @@
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#define BMP380_TEMP_MEAS_OFFSET 163
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#define BMP380_PRESS_MEAS_OFFSET 392
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#define BMP380_INT_STATUS_DRDY BIT(3)
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#define BMP380_INT_CTRL_SETTINGS_MASK GENMASK(2, 0)
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#define BMP380_INT_CTRL_OPEN_DRAIN BIT(0)
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#define BMP380_INT_CTRL_LEVEL BIT(1)
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#define BMP380_INT_CTRL_LATCH BIT(2)
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#define BMP380_INT_CTRL_DRDY_EN BIT(6)
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#define BMP380_MIN_TEMP -4000
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#define BMP380_MAX_TEMP 8500
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#define BMP380_MIN_PRES 3000000
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@ -407,6 +424,9 @@ struct bmp280_data {
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struct regmap *regmap;
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struct completion done;
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bool use_eoc;
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bool trig_open_drain;
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bool trig_active_high;
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struct iio_trigger *trig;
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const struct bmp280_chip_info *chip_info;
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union {
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struct bmp180_calib bmp180;
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@ -509,6 +529,7 @@ struct bmp280_chip_info {
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int (*set_mode)(struct bmp280_data *data, enum bmp280_op_mode mode);
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int (*wait_conv)(struct bmp280_data *data);
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int (*trigger_probe)(struct iio_dev *indio_dev);
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irqreturn_t (*trigger_handler)(int irq, void *p);
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};
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