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Merge branch 'net-dsa-mt7530-modernize-mib-handling-fix'
Christian Marangi says: ==================== net: dsa: mt7530: modernize MIB handling + fix This small series modernize MIB handling for MT7530 and also implement .get_stats64. It was reported that kernel and Switch MIB desync in scenario where a packet is forwarded from a port to another. In such case, the forwarding is offloaded and the kernel is not aware of the transmitted packet. To handle this, read the counter directly from Switch registers. ==================== Link: https://patch.msgid.link/20250410163022.3695-1-ansuelsmth@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Paolo Abeni
commit
4c2e0b00b5
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@ -32,47 +32,15 @@ static struct mt753x_pcs *pcs_to_mt753x_pcs(struct phylink_pcs *pcs)
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/* String, offset, and register size in bytes if different from 4 bytes */
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static const struct mt7530_mib_desc mt7530_mib[] = {
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MIB_DESC(1, 0x00, "TxDrop"),
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MIB_DESC(1, 0x04, "TxCrcErr"),
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MIB_DESC(1, 0x08, "TxUnicast"),
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MIB_DESC(1, 0x0c, "TxMulticast"),
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MIB_DESC(1, 0x10, "TxBroadcast"),
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MIB_DESC(1, 0x14, "TxCollision"),
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MIB_DESC(1, 0x18, "TxSingleCollision"),
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MIB_DESC(1, 0x1c, "TxMultipleCollision"),
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MIB_DESC(1, 0x20, "TxDeferred"),
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MIB_DESC(1, 0x24, "TxLateCollision"),
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MIB_DESC(1, 0x28, "TxExcessiveCollistion"),
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MIB_DESC(1, 0x2c, "TxPause"),
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MIB_DESC(1, 0x30, "TxPktSz64"),
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MIB_DESC(1, 0x34, "TxPktSz65To127"),
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MIB_DESC(1, 0x38, "TxPktSz128To255"),
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MIB_DESC(1, 0x3c, "TxPktSz256To511"),
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MIB_DESC(1, 0x40, "TxPktSz512To1023"),
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MIB_DESC(1, 0x44, "Tx1024ToMax"),
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MIB_DESC(2, 0x48, "TxBytes"),
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MIB_DESC(1, 0x60, "RxDrop"),
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MIB_DESC(1, 0x64, "RxFiltering"),
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MIB_DESC(1, 0x68, "RxUnicast"),
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MIB_DESC(1, 0x6c, "RxMulticast"),
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MIB_DESC(1, 0x70, "RxBroadcast"),
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MIB_DESC(1, 0x74, "RxAlignErr"),
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MIB_DESC(1, 0x78, "RxCrcErr"),
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MIB_DESC(1, 0x7c, "RxUnderSizeErr"),
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MIB_DESC(1, 0x80, "RxFragErr"),
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MIB_DESC(1, 0x84, "RxOverSzErr"),
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MIB_DESC(1, 0x88, "RxJabberErr"),
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MIB_DESC(1, 0x8c, "RxPause"),
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MIB_DESC(1, 0x90, "RxPktSz64"),
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MIB_DESC(1, 0x94, "RxPktSz65To127"),
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MIB_DESC(1, 0x98, "RxPktSz128To255"),
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MIB_DESC(1, 0x9c, "RxPktSz256To511"),
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MIB_DESC(1, 0xa0, "RxPktSz512To1023"),
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MIB_DESC(1, 0xa4, "RxPktSz1024ToMax"),
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MIB_DESC(2, 0xa8, "RxBytes"),
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MIB_DESC(1, 0xb0, "RxCtrlDrop"),
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MIB_DESC(1, 0xb4, "RxIngressDrop"),
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MIB_DESC(1, 0xb8, "RxArlDrop"),
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MIB_DESC(1, MT7530_PORT_MIB_TX_DROP, "TxDrop"),
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MIB_DESC(1, MT7530_PORT_MIB_TX_CRC_ERR, "TxCrcErr"),
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MIB_DESC(1, MT7530_PORT_MIB_TX_COLLISION, "TxCollision"),
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MIB_DESC(1, MT7530_PORT_MIB_RX_DROP, "RxDrop"),
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MIB_DESC(1, MT7530_PORT_MIB_RX_FILTERING, "RxFiltering"),
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MIB_DESC(1, MT7530_PORT_MIB_RX_CRC_ERR, "RxCrcErr"),
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MIB_DESC(1, MT7530_PORT_MIB_RX_CTRL_DROP, "RxCtrlDrop"),
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MIB_DESC(1, MT7530_PORT_MIB_RX_INGRESS_DROP, "RxIngressDrop"),
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MIB_DESC(1, MT7530_PORT_MIB_RX_ARL_DROP, "RxArlDrop"),
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};
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static void
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@ -789,24 +757,34 @@ mt7530_get_strings(struct dsa_switch *ds, int port, u32 stringset,
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ethtool_puts(&data, mt7530_mib[i].name);
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}
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static void
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mt7530_read_port_stats(struct mt7530_priv *priv, int port,
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u32 offset, u8 size, uint64_t *data)
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{
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u32 val, reg = MT7530_PORT_MIB_COUNTER(port) + offset;
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val = mt7530_read(priv, reg);
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*data = val;
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if (size == 2) {
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val = mt7530_read(priv, reg + 4);
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*data |= (u64)val << 32;
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}
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}
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static void
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mt7530_get_ethtool_stats(struct dsa_switch *ds, int port,
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uint64_t *data)
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{
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struct mt7530_priv *priv = ds->priv;
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const struct mt7530_mib_desc *mib;
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u32 reg, i;
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u64 hi;
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int i;
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for (i = 0; i < ARRAY_SIZE(mt7530_mib); i++) {
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mib = &mt7530_mib[i];
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reg = MT7530_PORT_MIB_COUNTER(port) + mib->offset;
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data[i] = mt7530_read(priv, reg);
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if (mib->size == 2) {
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hi = mt7530_read(priv, reg + 4);
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data[i] |= hi << 32;
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}
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mt7530_read_port_stats(priv, port, mib->offset, mib->size,
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data + i);
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}
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}
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@ -819,6 +797,172 @@ mt7530_get_sset_count(struct dsa_switch *ds, int port, int sset)
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return ARRAY_SIZE(mt7530_mib);
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}
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static void mt7530_get_eth_mac_stats(struct dsa_switch *ds, int port,
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struct ethtool_eth_mac_stats *mac_stats)
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{
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struct mt7530_priv *priv = ds->priv;
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/* MIB counter doesn't provide a FramesTransmittedOK but instead
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* provide stats for Unicast, Broadcast and Multicast frames separately.
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* To simulate a global frame counter, read Unicast and addition Multicast
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* and Broadcast later
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*/
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_UNICAST, 1,
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&mac_stats->FramesTransmittedOK);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_SINGLE_COLLISION, 1,
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&mac_stats->SingleCollisionFrames);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_MULTIPLE_COLLISION, 1,
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&mac_stats->MultipleCollisionFrames);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_UNICAST, 1,
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&mac_stats->FramesReceivedOK);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_BYTES, 2,
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&mac_stats->OctetsTransmittedOK);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_ALIGN_ERR, 1,
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&mac_stats->AlignmentErrors);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_DEFERRED, 1,
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&mac_stats->FramesWithDeferredXmissions);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_LATE_COLLISION, 1,
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&mac_stats->LateCollisions);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_EXCESSIVE_COLLISION, 1,
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&mac_stats->FramesAbortedDueToXSColls);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_BYTES, 2,
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&mac_stats->OctetsReceivedOK);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_MULTICAST, 1,
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&mac_stats->MulticastFramesXmittedOK);
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mac_stats->FramesTransmittedOK += mac_stats->MulticastFramesXmittedOK;
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_BROADCAST, 1,
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&mac_stats->BroadcastFramesXmittedOK);
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mac_stats->FramesTransmittedOK += mac_stats->BroadcastFramesXmittedOK;
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_MULTICAST, 1,
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&mac_stats->MulticastFramesReceivedOK);
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mac_stats->FramesReceivedOK += mac_stats->MulticastFramesReceivedOK;
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_BROADCAST, 1,
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&mac_stats->BroadcastFramesReceivedOK);
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mac_stats->FramesReceivedOK += mac_stats->BroadcastFramesReceivedOK;
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}
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static const struct ethtool_rmon_hist_range mt7530_rmon_ranges[] = {
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{ 0, 64 },
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{ 65, 127 },
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{ 128, 255 },
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{ 256, 511 },
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{ 512, 1023 },
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{ 1024, MT7530_MAX_MTU },
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{}
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};
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static void mt7530_get_rmon_stats(struct dsa_switch *ds, int port,
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struct ethtool_rmon_stats *rmon_stats,
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const struct ethtool_rmon_hist_range **ranges)
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{
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struct mt7530_priv *priv = ds->priv;
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_UNDER_SIZE_ERR, 1,
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&rmon_stats->undersize_pkts);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_OVER_SZ_ERR, 1,
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&rmon_stats->oversize_pkts);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_FRAG_ERR, 1,
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&rmon_stats->fragments);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_JABBER_ERR, 1,
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&rmon_stats->jabbers);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_64, 1,
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&rmon_stats->hist[0]);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_65_TO_127, 1,
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&rmon_stats->hist[1]);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_128_TO_255, 1,
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&rmon_stats->hist[2]);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_256_TO_511, 1,
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&rmon_stats->hist[3]);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_512_TO_1023, 1,
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&rmon_stats->hist[4]);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_1024_TO_MAX, 1,
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&rmon_stats->hist[5]);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_64, 1,
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&rmon_stats->hist_tx[0]);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_65_TO_127, 1,
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&rmon_stats->hist_tx[1]);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_128_TO_255, 1,
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&rmon_stats->hist_tx[2]);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_256_TO_511, 1,
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&rmon_stats->hist_tx[3]);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_512_TO_1023, 1,
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&rmon_stats->hist_tx[4]);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_1024_TO_MAX, 1,
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&rmon_stats->hist_tx[5]);
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*ranges = mt7530_rmon_ranges;
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}
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static void mt7530_get_stats64(struct dsa_switch *ds, int port,
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struct rtnl_link_stats64 *storage)
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{
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struct mt7530_priv *priv = ds->priv;
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uint64_t data;
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/* MIB counter doesn't provide a FramesTransmittedOK but instead
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* provide stats for Unicast, Broadcast and Multicast frames separately.
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* To simulate a global frame counter, read Unicast and addition Multicast
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* and Broadcast later
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*/
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_UNICAST, 1,
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&storage->rx_packets);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_MULTICAST, 1,
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&storage->multicast);
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storage->rx_packets += storage->multicast;
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_BROADCAST, 1,
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&data);
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storage->rx_packets += data;
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_UNICAST, 1,
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&storage->tx_packets);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_MULTICAST, 1,
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&data);
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storage->tx_packets += data;
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_BROADCAST, 1,
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&data);
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storage->tx_packets += data;
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_BYTES, 2,
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&storage->rx_bytes);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_BYTES, 2,
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&storage->tx_bytes);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_DROP, 1,
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&storage->rx_dropped);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_DROP, 1,
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&storage->tx_dropped);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_CRC_ERR, 1,
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&storage->rx_crc_errors);
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}
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static void mt7530_get_eth_ctrl_stats(struct dsa_switch *ds, int port,
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struct ethtool_eth_ctrl_stats *ctrl_stats)
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{
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struct mt7530_priv *priv = ds->priv;
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PAUSE, 1,
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&ctrl_stats->MACControlFramesTransmitted);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PAUSE, 1,
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&ctrl_stats->MACControlFramesReceived);
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}
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static int
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mt7530_set_ageing_time(struct dsa_switch *ds, unsigned int msecs)
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{
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@ -3105,6 +3249,10 @@ const struct dsa_switch_ops mt7530_switch_ops = {
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.get_strings = mt7530_get_strings,
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.get_ethtool_stats = mt7530_get_ethtool_stats,
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.get_sset_count = mt7530_get_sset_count,
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.get_eth_mac_stats = mt7530_get_eth_mac_stats,
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.get_rmon_stats = mt7530_get_rmon_stats,
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.get_eth_ctrl_stats = mt7530_get_eth_ctrl_stats,
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.get_stats64 = mt7530_get_stats64,
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.set_ageing_time = mt7530_set_ageing_time,
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.port_enable = mt7530_port_enable,
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.port_disable = mt7530_port_disable,
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@ -423,6 +423,48 @@ enum mt7530_vlan_port_acc_frm {
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/* Register for MIB */
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#define MT7530_PORT_MIB_COUNTER(x) (0x4000 + (x) * 0x100)
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/* Each define is an offset of MT7530_PORT_MIB_COUNTER */
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#define MT7530_PORT_MIB_TX_DROP 0x00
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#define MT7530_PORT_MIB_TX_CRC_ERR 0x04
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#define MT7530_PORT_MIB_TX_UNICAST 0x08
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#define MT7530_PORT_MIB_TX_MULTICAST 0x0c
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#define MT7530_PORT_MIB_TX_BROADCAST 0x10
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#define MT7530_PORT_MIB_TX_COLLISION 0x14
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#define MT7530_PORT_MIB_TX_SINGLE_COLLISION 0x18
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#define MT7530_PORT_MIB_TX_MULTIPLE_COLLISION 0x1c
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#define MT7530_PORT_MIB_TX_DEFERRED 0x20
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#define MT7530_PORT_MIB_TX_LATE_COLLISION 0x24
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#define MT7530_PORT_MIB_TX_EXCESSIVE_COLLISION 0x28
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#define MT7530_PORT_MIB_TX_PAUSE 0x2c
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#define MT7530_PORT_MIB_TX_PKT_SZ_64 0x30
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#define MT7530_PORT_MIB_TX_PKT_SZ_65_TO_127 0x34
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#define MT7530_PORT_MIB_TX_PKT_SZ_128_TO_255 0x38
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#define MT7530_PORT_MIB_TX_PKT_SZ_256_TO_511 0x3c
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#define MT7530_PORT_MIB_TX_PKT_SZ_512_TO_1023 0x40
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#define MT7530_PORT_MIB_TX_PKT_SZ_1024_TO_MAX 0x44
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#define MT7530_PORT_MIB_TX_BYTES 0x48 /* 64 bytes */
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#define MT7530_PORT_MIB_RX_DROP 0x60
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#define MT7530_PORT_MIB_RX_FILTERING 0x64
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#define MT7530_PORT_MIB_RX_UNICAST 0x68
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#define MT7530_PORT_MIB_RX_MULTICAST 0x6c
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#define MT7530_PORT_MIB_RX_BROADCAST 0x70
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#define MT7530_PORT_MIB_RX_ALIGN_ERR 0x74
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#define MT7530_PORT_MIB_RX_CRC_ERR 0x78
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#define MT7530_PORT_MIB_RX_UNDER_SIZE_ERR 0x7c
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#define MT7530_PORT_MIB_RX_FRAG_ERR 0x80
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#define MT7530_PORT_MIB_RX_OVER_SZ_ERR 0x84
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#define MT7530_PORT_MIB_RX_JABBER_ERR 0x88
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#define MT7530_PORT_MIB_RX_PAUSE 0x8c
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#define MT7530_PORT_MIB_RX_PKT_SZ_64 0x90
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#define MT7530_PORT_MIB_RX_PKT_SZ_65_TO_127 0x94
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#define MT7530_PORT_MIB_RX_PKT_SZ_128_TO_255 0x98
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#define MT7530_PORT_MIB_RX_PKT_SZ_256_TO_511 0x9c
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#define MT7530_PORT_MIB_RX_PKT_SZ_512_TO_1023 0xa0
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#define MT7530_PORT_MIB_RX_PKT_SZ_1024_TO_MAX 0xa4
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#define MT7530_PORT_MIB_RX_BYTES 0xa8 /* 64 bytes */
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||||
#define MT7530_PORT_MIB_RX_CTRL_DROP 0xb0
|
||||
#define MT7530_PORT_MIB_RX_INGRESS_DROP 0xb4
|
||||
#define MT7530_PORT_MIB_RX_ARL_DROP 0xb8
|
||||
#define MT7530_MIB_CCR 0x4fe0
|
||||
#define CCR_MIB_ENABLE BIT(31)
|
||||
#define CCR_RX_OCT_CNT_GOOD BIT(7)
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user