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arm64: dts: freescale: imx8mm-var-som: Add MCP251xFD CAN controller

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Add support for the Microchip MCP251xFD CAN-FD controller connected
to the SPI bus on the i.MX8MM VAR-SOM.

The controller uses a 40 MHz external oscillator and requires an
interrupt line and a dedicated RX interrupt GPIO.

Add the fixed clock, the MCP251xFD device node with the required
properties, and the corresponding pinctrl configuration.

Signed-off-by: Stefano Radaelli <stefano.r@variscite.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Stefano Radaelli 2026-03-19 19:40:25 +01:00 committed by Frank Li
parent 3eb24db8fa
commit 4c2d9f56f4
1 changed files with 27 additions and 0 deletions
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27
arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi
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@ -14,6 +14,13 @@ memory@40000000 {
reg = <0x0 0x40000000 0 0x80000000>;
};
clk40m: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <40000000>;
clock-output-names = "can_osc";
};
reg_audio_supply: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "wm8904-supply";
@ -139,6 +146,19 @@ touchscreen@0 {
ti,keep-vref-on;
wakeup-source;
};
/* CAN controller */
can0: can@1 {
compatible = "microchip,mcp251xfd";
reg = <1>;
clocks = <&clk40m>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can>;
interrupt-parent = <&gpio1>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
spi-max-frequency = <20000000>;
microchip,rx-int-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
};
};
&fec1 {
@ -424,6 +444,13 @@ &wdog1 {
};
&iomuxc {
pinctrl_can: cangrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x16
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x16
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x13