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arm64: dts: qcom: lemans: Separate out ethernet card for ride & ride-r3
Ride & Ride-r3 in lemans/lemans-auto uses different ethernet cards with different phy capabilities. Separate out the ethernet card information from main board so that it can be reused for all the variants of ride & ride-r3 platforms in lemans/lemans-auto. Lemans/lemans-auto Ride uses 1G phy while Lemans/lemans-auto Ride-r3 uses 2.5G phy. Introduce ethernet cards with 1G & 2.5G phy capabilities respectively: *-88ea1512.dtsi is for 2x 1G - SGMII (Marvell 88EA1512-B2) phy *-aqr115c.dtsi is for 2x 2.5G - HSGMII (Marvell AQR115c) phy Nacked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wasim Nazir <wasim.nazir@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250803110113.401927-4-wasim.nazir@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Wasim Nazir
Bjorn Andersson
parent
24dc241bdd
commit
4c0c97b95a
205
arch/arm64/boot/dts/qcom/lemans-ride-ethernet-88ea1512.dtsi
Normal file
205
arch/arm64/boot/dts/qcom/lemans-ride-ethernet-88ea1512.dtsi
Normal file
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@ -0,0 +1,205 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2023, Linaro Limited
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*/
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/*
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* Ethernet card for Lemans based Ride boards.
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* It supports 2x 1G - SGMII (Marvell 88EA1512-B2) phy for Main domain
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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aliases {
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ethernet0 = ðernet0;
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ethernet1 = ðernet1;
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};
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};
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&tlmm {
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ethernet0_default: ethernet0-default-state {
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ethernet0_mdc: ethernet0-mdc-pins {
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pins = "gpio8";
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function = "emac0_mdc";
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drive-strength = <16>;
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bias-pull-up;
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};
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ethernet0_mdio: ethernet0-mdio-pins {
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pins = "gpio9";
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function = "emac0_mdio";
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drive-strength = <16>;
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bias-pull-up;
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};
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};
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};
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ðernet0 {
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phy-handle = <&sgmii_phy0>;
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phy-mode = "sgmii";
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pinctrl-0 = <ðernet0_default>;
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pinctrl-names = "default";
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snps,mtl-rx-config = <&mtl_rx_setup>;
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snps,mtl-tx-config = <&mtl_tx_setup>;
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snps,ps-speed = <1000>;
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status = "okay";
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mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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sgmii_phy0: phy@8 {
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compatible = "ethernet-phy-id0141.0dd4";
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reg = <0x8>;
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device_type = "ethernet-phy";
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interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>;
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reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>;
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reset-assert-us = <11000>;
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reset-deassert-us = <70000>;
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};
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sgmii_phy1: phy@a {
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compatible = "ethernet-phy-id0141.0dd4";
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reg = <0xa>;
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device_type = "ethernet-phy";
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interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>;
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reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>;
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reset-assert-us = <11000>;
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reset-deassert-us = <70000>;
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};
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};
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mtl_rx_setup: rx-queues-config {
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snps,rx-queues-to-use = <4>;
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snps,rx-sched-sp;
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queue0 {
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snps,dcb-algorithm;
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snps,map-to-dma-channel = <0x0>;
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snps,route-up;
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snps,priority = <0x1>;
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};
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queue1 {
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snps,dcb-algorithm;
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snps,map-to-dma-channel = <0x1>;
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snps,route-ptp;
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};
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queue2 {
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snps,avb-algorithm;
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snps,map-to-dma-channel = <0x2>;
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snps,route-avcp;
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};
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queue3 {
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snps,avb-algorithm;
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snps,map-to-dma-channel = <0x3>;
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snps,priority = <0xc>;
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};
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};
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mtl_tx_setup: tx-queues-config {
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snps,tx-queues-to-use = <4>;
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queue0 {
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snps,dcb-algorithm;
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};
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queue1 {
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snps,dcb-algorithm;
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};
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queue2 {
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snps,avb-algorithm;
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snps,send_slope = <0x1000>;
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snps,idle_slope = <0x1000>;
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snps,high_credit = <0x3e800>;
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snps,low_credit = <0xffc18000>;
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};
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queue3 {
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snps,avb-algorithm;
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snps,send_slope = <0x1000>;
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snps,idle_slope = <0x1000>;
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snps,high_credit = <0x3e800>;
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snps,low_credit = <0xffc18000>;
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};
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};
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};
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ðernet1 {
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phy-handle = <&sgmii_phy1>;
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phy-mode = "sgmii";
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snps,mtl-rx-config = <&mtl_rx_setup1>;
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snps,mtl-tx-config = <&mtl_tx_setup1>;
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snps,ps-speed = <1000>;
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status = "okay";
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mtl_rx_setup1: rx-queues-config {
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snps,rx-queues-to-use = <4>;
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snps,rx-sched-sp;
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queue0 {
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snps,dcb-algorithm;
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snps,map-to-dma-channel = <0x0>;
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snps,route-up;
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snps,priority = <0x1>;
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};
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queue1 {
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snps,dcb-algorithm;
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snps,map-to-dma-channel = <0x1>;
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snps,route-ptp;
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};
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queue2 {
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snps,avb-algorithm;
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snps,map-to-dma-channel = <0x2>;
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snps,route-avcp;
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};
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queue3 {
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snps,avb-algorithm;
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snps,map-to-dma-channel = <0x3>;
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snps,priority = <0xc>;
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};
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};
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mtl_tx_setup1: tx-queues-config {
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snps,tx-queues-to-use = <4>;
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queue0 {
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snps,dcb-algorithm;
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};
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queue1 {
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snps,dcb-algorithm;
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};
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queue2 {
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snps,avb-algorithm;
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snps,send_slope = <0x1000>;
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snps,idle_slope = <0x1000>;
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snps,high_credit = <0x3e800>;
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snps,low_credit = <0xffc18000>;
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};
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queue3 {
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snps,avb-algorithm;
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snps,send_slope = <0x1000>;
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snps,idle_slope = <0x1000>;
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snps,high_credit = <0x3e800>;
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snps,low_credit = <0xffc18000>;
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};
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};
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};
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205
arch/arm64/boot/dts/qcom/lemans-ride-ethernet-aqr115c.dtsi
Normal file
205
arch/arm64/boot/dts/qcom/lemans-ride-ethernet-aqr115c.dtsi
Normal file
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@ -0,0 +1,205 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2023, Linaro Limited
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*/
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/*
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* Ethernet card for Lemans based Ride r3 boards.
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* It supports 2x 2.5G - HSGMII (Marvell hsgmii) phy for Main domain
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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aliases {
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ethernet0 = ðernet0;
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ethernet1 = ðernet1;
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};
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};
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&tlmm {
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ethernet0_default: ethernet0-default-state {
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ethernet0_mdc: ethernet0-mdc-pins {
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pins = "gpio8";
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function = "emac0_mdc";
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drive-strength = <16>;
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bias-pull-up;
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};
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ethernet0_mdio: ethernet0-mdio-pins {
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pins = "gpio9";
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function = "emac0_mdio";
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drive-strength = <16>;
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bias-pull-up;
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};
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};
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};
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ðernet0 {
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phy-handle = <&hsgmii_phy0>;
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phy-mode = "2500base-x";
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pinctrl-0 = <ðernet0_default>;
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pinctrl-names = "default";
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snps,mtl-rx-config = <&mtl_rx_setup>;
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snps,mtl-tx-config = <&mtl_tx_setup>;
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snps,ps-speed = <1000>;
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status = "okay";
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mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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hsgmii_phy0: phy@8 {
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compatible = "ethernet-phy-id31c3.1c33";
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reg = <0x8>;
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device_type = "ethernet-phy";
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interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>;
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reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>;
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reset-assert-us = <11000>;
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reset-deassert-us = <70000>;
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};
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hsgmii_phy1: phy@0 {
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compatible = "ethernet-phy-id31c3.1c33";
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reg = <0x0>;
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device_type = "ethernet-phy";
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interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>;
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reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>;
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reset-assert-us = <11000>;
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reset-deassert-us = <70000>;
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};
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};
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mtl_rx_setup: rx-queues-config {
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snps,rx-queues-to-use = <4>;
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snps,rx-sched-sp;
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queue0 {
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snps,dcb-algorithm;
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snps,map-to-dma-channel = <0x0>;
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snps,route-up;
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snps,priority = <0x1>;
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};
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queue1 {
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snps,dcb-algorithm;
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snps,map-to-dma-channel = <0x1>;
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snps,route-ptp;
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};
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queue2 {
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snps,avb-algorithm;
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snps,map-to-dma-channel = <0x2>;
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snps,route-avcp;
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};
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queue3 {
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snps,avb-algorithm;
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snps,map-to-dma-channel = <0x3>;
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snps,priority = <0xc>;
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};
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};
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mtl_tx_setup: tx-queues-config {
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snps,tx-queues-to-use = <4>;
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queue0 {
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snps,dcb-algorithm;
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};
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queue1 {
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snps,dcb-algorithm;
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};
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queue2 {
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snps,avb-algorithm;
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snps,send_slope = <0x1000>;
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snps,idle_slope = <0x1000>;
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snps,high_credit = <0x3e800>;
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snps,low_credit = <0xffc18000>;
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};
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queue3 {
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snps,avb-algorithm;
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snps,send_slope = <0x1000>;
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snps,idle_slope = <0x1000>;
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snps,high_credit = <0x3e800>;
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snps,low_credit = <0xffc18000>;
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};
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};
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};
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ðernet1 {
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phy-handle = <&hsgmii_phy1>;
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phy-mode = "2500base-x";
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snps,mtl-rx-config = <&mtl_rx_setup1>;
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snps,mtl-tx-config = <&mtl_tx_setup1>;
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snps,ps-speed = <1000>;
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status = "okay";
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mtl_rx_setup1: rx-queues-config {
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snps,rx-queues-to-use = <4>;
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snps,rx-sched-sp;
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queue0 {
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snps,dcb-algorithm;
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snps,map-to-dma-channel = <0x0>;
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snps,route-up;
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snps,priority = <0x1>;
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};
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queue1 {
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snps,dcb-algorithm;
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snps,map-to-dma-channel = <0x1>;
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snps,route-ptp;
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};
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queue2 {
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snps,avb-algorithm;
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snps,map-to-dma-channel = <0x2>;
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snps,route-avcp;
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};
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queue3 {
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snps,avb-algorithm;
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snps,map-to-dma-channel = <0x3>;
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snps,priority = <0xc>;
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};
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};
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mtl_tx_setup1: tx-queues-config {
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snps,tx-queues-to-use = <4>;
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queue0 {
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snps,dcb-algorithm;
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};
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queue1 {
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snps,dcb-algorithm;
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};
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queue2 {
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snps,avb-algorithm;
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snps,send_slope = <0x1000>;
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snps,idle_slope = <0x1000>;
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snps,high_credit = <0x3e800>;
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snps,low_credit = <0xffc18000>;
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};
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queue3 {
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snps,avb-algorithm;
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snps,send_slope = <0x1000>;
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snps,idle_slope = <0x1000>;
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snps,high_credit = <0x3e800>;
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snps,low_credit = <0xffc18000>;
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};
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};
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};
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@ -6,42 +6,9 @@
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/dts-v1/;
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#include "sa8775p-ride.dtsi"
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#include "lemans-ride-ethernet-aqr115c.dtsi"
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/ {
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model = "Qualcomm SA8775P Ride Rev3";
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compatible = "qcom,sa8775p-ride-r3", "qcom,sa8775p";
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};
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ðernet0 {
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phy-mode = "2500base-x";
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};
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ðernet1 {
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phy-mode = "2500base-x";
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};
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&mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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sgmii_phy0: phy@8 {
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compatible = "ethernet-phy-id31c3.1c33";
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reg = <0x8>;
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device_type = "ethernet-phy";
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interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>;
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reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>;
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reset-assert-us = <11000>;
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reset-deassert-us = <70000>;
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};
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sgmii_phy1: phy@0 {
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compatible = "ethernet-phy-id31c3.1c33";
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reg = <0x0>;
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device_type = "ethernet-phy";
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interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>;
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reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>;
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reset-assert-us = <11000>;
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reset-deassert-us = <70000>;
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};
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};
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|
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@ -6,42 +6,9 @@
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/dts-v1/;
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#include "sa8775p-ride.dtsi"
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#include "lemans-ride-ethernet-88ea1512.dtsi"
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/ {
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model = "Qualcomm SA8775P Ride";
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compatible = "qcom,sa8775p-ride", "qcom,sa8775p";
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};
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ðernet0 {
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phy-mode = "sgmii";
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};
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ðernet1 {
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phy-mode = "sgmii";
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};
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&mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sgmii_phy0: phy@8 {
|
||||
compatible = "ethernet-phy-id0141.0dd4";
|
||||
reg = <0x8>;
|
||||
device_type = "ethernet-phy";
|
||||
interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>;
|
||||
reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>;
|
||||
reset-assert-us = <11000>;
|
||||
reset-deassert-us = <70000>;
|
||||
};
|
||||
|
||||
sgmii_phy1: phy@a {
|
||||
compatible = "ethernet-phy-id0141.0dd4";
|
||||
reg = <0xa>;
|
||||
device_type = "ethernet-phy";
|
||||
interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>;
|
||||
reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>;
|
||||
reset-assert-us = <11000>;
|
||||
reset-deassert-us = <70000>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -13,8 +13,6 @@
|
|||
|
||||
/ {
|
||||
aliases {
|
||||
ethernet0 = ðernet0;
|
||||
ethernet1 = ðernet1;
|
||||
i2c11 = &i2c11;
|
||||
i2c18 = &i2c18;
|
||||
serial0 = &uart10;
|
||||
|
|
@ -443,151 +441,6 @@ vreg_l8e: ldo8 {
|
|||
};
|
||||
};
|
||||
|
||||
ðernet0 {
|
||||
phy-handle = <&sgmii_phy0>;
|
||||
|
||||
pinctrl-0 = <ðernet0_default>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
snps,mtl-rx-config = <&mtl_rx_setup>;
|
||||
snps,mtl-tx-config = <&mtl_tx_setup>;
|
||||
snps,ps-speed = <1000>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
mdio: mdio {
|
||||
compatible = "snps,dwmac-mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
mtl_rx_setup: rx-queues-config {
|
||||
snps,rx-queues-to-use = <4>;
|
||||
snps,rx-sched-sp;
|
||||
|
||||
queue0 {
|
||||
snps,dcb-algorithm;
|
||||
snps,map-to-dma-channel = <0x0>;
|
||||
snps,route-up;
|
||||
snps,priority = <0x1>;
|
||||
};
|
||||
|
||||
queue1 {
|
||||
snps,dcb-algorithm;
|
||||
snps,map-to-dma-channel = <0x1>;
|
||||
snps,route-ptp;
|
||||
};
|
||||
|
||||
queue2 {
|
||||
snps,avb-algorithm;
|
||||
snps,map-to-dma-channel = <0x2>;
|
||||
snps,route-avcp;
|
||||
};
|
||||
|
||||
queue3 {
|
||||
snps,avb-algorithm;
|
||||
snps,map-to-dma-channel = <0x3>;
|
||||
snps,priority = <0xc>;
|
||||
};
|
||||
};
|
||||
|
||||
mtl_tx_setup: tx-queues-config {
|
||||
snps,tx-queues-to-use = <4>;
|
||||
|
||||
queue0 {
|
||||
snps,dcb-algorithm;
|
||||
};
|
||||
|
||||
queue1 {
|
||||
snps,dcb-algorithm;
|
||||
};
|
||||
|
||||
queue2 {
|
||||
snps,avb-algorithm;
|
||||
snps,send_slope = <0x1000>;
|
||||
snps,idle_slope = <0x1000>;
|
||||
snps,high_credit = <0x3e800>;
|
||||
snps,low_credit = <0xffc18000>;
|
||||
};
|
||||
|
||||
queue3 {
|
||||
snps,avb-algorithm;
|
||||
snps,send_slope = <0x1000>;
|
||||
snps,idle_slope = <0x1000>;
|
||||
snps,high_credit = <0x3e800>;
|
||||
snps,low_credit = <0xffc18000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ðernet1 {
|
||||
phy-handle = <&sgmii_phy1>;
|
||||
|
||||
snps,mtl-rx-config = <&mtl_rx_setup1>;
|
||||
snps,mtl-tx-config = <&mtl_tx_setup1>;
|
||||
snps,ps-speed = <1000>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
mtl_rx_setup1: rx-queues-config {
|
||||
snps,rx-queues-to-use = <4>;
|
||||
snps,rx-sched-sp;
|
||||
|
||||
queue0 {
|
||||
snps,dcb-algorithm;
|
||||
snps,map-to-dma-channel = <0x0>;
|
||||
snps,route-up;
|
||||
snps,priority = <0x1>;
|
||||
};
|
||||
|
||||
queue1 {
|
||||
snps,dcb-algorithm;
|
||||
snps,map-to-dma-channel = <0x1>;
|
||||
snps,route-ptp;
|
||||
};
|
||||
|
||||
queue2 {
|
||||
snps,avb-algorithm;
|
||||
snps,map-to-dma-channel = <0x2>;
|
||||
snps,route-avcp;
|
||||
};
|
||||
|
||||
queue3 {
|
||||
snps,avb-algorithm;
|
||||
snps,map-to-dma-channel = <0x3>;
|
||||
snps,priority = <0xc>;
|
||||
};
|
||||
};
|
||||
|
||||
mtl_tx_setup1: tx-queues-config {
|
||||
snps,tx-queues-to-use = <4>;
|
||||
|
||||
queue0 {
|
||||
snps,dcb-algorithm;
|
||||
};
|
||||
|
||||
queue1 {
|
||||
snps,dcb-algorithm;
|
||||
};
|
||||
|
||||
queue2 {
|
||||
snps,avb-algorithm;
|
||||
snps,send_slope = <0x1000>;
|
||||
snps,idle_slope = <0x1000>;
|
||||
snps,high_credit = <0x3e800>;
|
||||
snps,low_credit = <0xffc18000>;
|
||||
};
|
||||
|
||||
queue3 {
|
||||
snps,avb-algorithm;
|
||||
snps,send_slope = <0x1000>;
|
||||
snps,idle_slope = <0x1000>;
|
||||
snps,high_credit = <0x3e800>;
|
||||
snps,low_credit = <0xffc18000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c11 {
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
|
|
@ -960,22 +813,6 @@ dp1_hot_plug_det: dp1-hot-plug-det-state {
|
|||
bias-disable;
|
||||
};
|
||||
|
||||
ethernet0_default: ethernet0-default-state {
|
||||
ethernet0_mdc: ethernet0-mdc-pins {
|
||||
pins = "gpio8";
|
||||
function = "emac0_mdc";
|
||||
drive-strength = <16>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
ethernet0_mdio: ethernet0-mdio-pins {
|
||||
pins = "gpio9";
|
||||
function = "emac0_mdio";
|
||||
drive-strength = <16>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
io_expander_intr_active: io-expander-intr-active-state {
|
||||
pins = "gpio98";
|
||||
function = "gpio";
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user