arm64: dts: amlogic: meson-s4: add internal SARADC controller

Add the SARADC (Successive Approximation Register ADC) controller
node to the Meson S4 SoC dtsi.

It uses the S4-specific compatible string with a fallback to the
G12A generation, as there are no known hardware differences.

Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Nick Xie <nick@khadas.com>
Link: https://patch.msgid.link/20260325070618.81955-4-nick@khadas.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
This commit is contained in:
Nick Xie 2026-03-25 15:06:17 +08:00 committed by Neil Armstrong
parent 8c45bf9ae4
commit 4badf8d60d

View File

@ -77,6 +77,20 @@ pwrc: power-controller {
};
};
saradc: adc@fe026000 {
compatible = "amlogic,meson-s4-saradc",
"amlogic,meson-g12a-saradc";
reg = <0x0 0xfe026000 0x0 0x48>;
#io-channel-cells = <1>;
interrupts = <GIC_SPI 181 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>,
<&clkc_periphs CLKID_SAR_ADC>,
<&clkc_periphs CLKID_SARADC>,
<&clkc_periphs CLKID_SARADC_SEL>;
clock-names = "clkin", "core", "adc_clk", "adc_sel";
status = "disabled";
};
soc {
compatible = "simple-bus";
#address-cells = <2>;