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arm64: dts: qcom: x1e80100: Add missing 'global' PCIe interrupt

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'global' interrupt is used to receive PCIe controller and link specific
events.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250227-pcie-global-irq-v1-23-2b70a7819d1e@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Manivannan Sadhasivam 2025-02-27 19:11:05 +05:30 committed by Bjorn Andersson
parent 34d10f3347
commit 4ba960e75b
1 changed files with 12 additions and 6 deletions
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18
arch/arm64/boot/dts/qcom/x1e80100.dtsi
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@ -3378,7 +3378,8 @@ pcie6a: pci@1bf8000 {
<GIC_SPI 839 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 841 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 842 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 842 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi0",
"msi1",
"msi2",
@ -3386,7 +3387,8 @@ pcie6a: pci@1bf8000 {
"msi4",
"msi5",
"msi6",
"msi7";
"msi7",
"global";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
@ -3508,7 +3510,8 @@ pcie5: pci@1c00000 {
<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi0",
"msi1",
"msi2",
@ -3516,7 +3519,8 @@ pcie5: pci@1c00000 {
"msi4",
"msi5",
"msi6",
"msi7";
"msi7",
"global";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
@ -3636,7 +3640,8 @@ pcie4: pci@1c08000 {
<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi0",
"msi1",
"msi2",
@ -3644,7 +3649,8 @@ pcie4: pci@1c08000 {
"msi4",
"msi5",
"msi6",
"msi7";
"msi7",
"global";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;