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drm/amd: Drop calls to restore power limit and clock from smu_resume()
User requested power limits and clock settings are already restored as part of smu_restore_dpm_user_profile(). It's unnecessary to call the same restore as part of smu_resume(). Revert the following commits to drop that extra restore: commited4efe426a("drm/amd: Restore cached power limit during resume") commit796ff8a7e0("drm/amd: Restore cached manual clock settings during resume") commitf9b80514a7("drm/amd: Only restore cached manual clock settings in restore if OD enabled") Suggested-by: Lijo Lazar <Lijo.Lazar@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2239,7 +2239,6 @@ static int smu_resume(struct amdgpu_ip_block *ip_block)
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int ret;
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struct amdgpu_device *adev = ip_block->adev;
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struct smu_context *smu = adev->powerplay.pp_handle;
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struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
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if (amdgpu_sriov_multi_vf_mode(adev))
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return 0;
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@ -2271,18 +2270,6 @@ static int smu_resume(struct amdgpu_ip_block *ip_block)
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adev->pm.dpm_enabled = true;
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if (smu->current_power_limit) {
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ret = smu_set_power_limit(smu, SMU_DEFAULT_PPT_LIMIT, smu->current_power_limit);
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if (ret && ret != -EOPNOTSUPP)
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return ret;
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}
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if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL && smu->od_enabled) {
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ret = smu_od_edit_dpm_table(smu, PP_OD_COMMIT_DPM_TABLE, NULL, 0);
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if (ret)
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return ret;
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}
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dev_info(adev->dev, "SMU is resumed successfully!\n");
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return 0;
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