From 4b1433a0d11d7a8f9ccda39b9e36a263170d3a7f Mon Sep 17 00:00:00 2001 From: Stefano Radaelli Date: Wed, 3 Jun 2026 10:25:03 +0200 Subject: [PATCH] arm64: dts: imx93-var-som-symphony: enable TPM3 PWM Enable TPM3 on the Symphony carrier board and add the pinctrl states for the PWM output and sleep configuration. Signed-off-by: Stefano Radaelli Signed-off-by: Frank Li --- .../dts/freescale/imx93-var-som-symphony.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts index c835394468ef..56f8744c861a 100644 --- a/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts +++ b/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts @@ -320,6 +320,13 @@ &lpuart7 { status = "okay"; }; +&tpm3 { + pinctrl-0 = <&pinctrl_tpm3>; + pinctrl-1 = <&pinctrl_tpm3_sleep>; + pinctrl-names = "default", "sleep"; + status = "okay"; +}; + &usbotg1 { dr_mode = "otg"; hnp-disable; @@ -442,6 +449,18 @@ MX93_PAD_PDM_BIT_STREAM1__GPIO1_IO10 0x31e >; }; + pinctrl_tpm3: tpm3grp { + fsl,pins = < + MX93_PAD_GPIO_IO24__TPM3_CH3 0x51e + >; + }; + + pinctrl_tpm3_sleep: tpm3sleepgrp { + fsl,pins = < + MX93_PAD_GPIO_IO24__GPIO2_IO24 0x51e + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX93_PAD_UART1_RXD__LPUART1_RX 0x31e