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net: bcmasp: Remove support for asp-v2.0
The SoC that supported asp-v2.0 never saw the light of day. asp-v2.0 has quirks that makes the logic overly complicated. For example, asp-v2.0 is the only revision that has a different wake up IRQ hook up. Remove asp-v2.0 support to make supporting future HW revisions cleaner. Signed-off-by: Justin Chen <justin.chen@broadcom.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/20250422233645.1931036-4-justin.chen@broadcom.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
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62c8c4656e
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@ -141,7 +141,7 @@ void bcmasp_flush_rx_port(struct bcmasp_intf *intf)
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return;
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}
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rx_ctrl_core_wl(priv, mask, priv->hw_info->rx_ctrl_flush);
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rx_ctrl_core_wl(priv, mask, ASP_RX_CTRL_FLUSH);
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}
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static void bcmasp_netfilt_hw_en_wake(struct bcmasp_priv *priv,
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@ -1108,7 +1108,7 @@ static int bcmasp_get_and_request_irq(struct bcmasp_priv *priv, int i)
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return irq;
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}
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static void bcmasp_init_wol_shared(struct bcmasp_priv *priv)
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static void bcmasp_init_wol(struct bcmasp_priv *priv)
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{
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struct platform_device *pdev = priv->pdev;
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struct device *dev = &pdev->dev;
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@ -1125,7 +1125,7 @@ static void bcmasp_init_wol_shared(struct bcmasp_priv *priv)
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device_set_wakeup_capable(&pdev->dev, 1);
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}
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static void bcmasp_enable_wol_shared(struct bcmasp_intf *intf, bool en)
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void bcmasp_enable_wol(struct bcmasp_intf *intf, bool en)
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{
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struct bcmasp_priv *priv = intf->parent;
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struct device *dev = &priv->pdev->dev;
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@ -1154,54 +1154,12 @@ static void bcmasp_enable_wol_shared(struct bcmasp_intf *intf, bool en)
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}
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}
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static void bcmasp_wol_irq_destroy_shared(struct bcmasp_priv *priv)
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static void bcmasp_wol_irq_destroy(struct bcmasp_priv *priv)
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{
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if (priv->wol_irq > 0)
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free_irq(priv->wol_irq, priv);
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}
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static void bcmasp_init_wol_per_intf(struct bcmasp_priv *priv)
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{
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struct platform_device *pdev = priv->pdev;
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struct device *dev = &pdev->dev;
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struct bcmasp_intf *intf;
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int irq;
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list_for_each_entry(intf, &priv->intfs, list) {
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irq = bcmasp_get_and_request_irq(priv, intf->port + 1);
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if (irq < 0) {
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dev_warn(dev, "Failed to init WoL irq(port %d): %d\n",
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intf->port, irq);
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continue;
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}
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intf->wol_irq = irq;
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intf->wol_irq_enabled = false;
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device_set_wakeup_capable(&pdev->dev, 1);
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}
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}
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static void bcmasp_enable_wol_per_intf(struct bcmasp_intf *intf, bool en)
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{
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struct device *dev = &intf->parent->pdev->dev;
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if (en ^ intf->wol_irq_enabled)
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irq_set_irq_wake(intf->wol_irq, en);
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intf->wol_irq_enabled = en;
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device_set_wakeup_enable(dev, en);
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}
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static void bcmasp_wol_irq_destroy_per_intf(struct bcmasp_priv *priv)
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{
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struct bcmasp_intf *intf;
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list_for_each_entry(intf, &priv->intfs, list) {
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if (intf->wol_irq > 0)
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free_irq(intf->wol_irq, priv);
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}
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}
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static void bcmasp_eee_fixup(struct bcmasp_intf *intf, bool en)
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{
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u32 reg, phy_lpi_overwrite;
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@ -1220,60 +1178,22 @@ static void bcmasp_eee_fixup(struct bcmasp_intf *intf, bool en)
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usleep_range(50, 100);
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}
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static struct bcmasp_hw_info v20_hw_info = {
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.rx_ctrl_flush = ASP_RX_CTRL_FLUSH,
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.umac2fb = UMAC2FB_OFFSET,
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.rx_ctrl_fb_out_frame_count = ASP_RX_CTRL_FB_OUT_FRAME_COUNT,
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.rx_ctrl_fb_filt_out_frame_count = ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT,
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.rx_ctrl_fb_rx_fifo_depth = ASP_RX_CTRL_FB_RX_FIFO_DEPTH,
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};
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static const struct bcmasp_plat_data v20_plat_data = {
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.init_wol = bcmasp_init_wol_per_intf,
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.enable_wol = bcmasp_enable_wol_per_intf,
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.destroy_wol = bcmasp_wol_irq_destroy_per_intf,
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.core_clock_select = bcmasp_core_clock_select_one,
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.hw_info = &v20_hw_info,
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};
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static struct bcmasp_hw_info v21_hw_info = {
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.rx_ctrl_flush = ASP_RX_CTRL_FLUSH_2_1,
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.umac2fb = UMAC2FB_OFFSET_2_1,
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.rx_ctrl_fb_out_frame_count = ASP_RX_CTRL_FB_OUT_FRAME_COUNT_2_1,
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.rx_ctrl_fb_filt_out_frame_count =
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ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT_2_1,
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.rx_ctrl_fb_rx_fifo_depth = ASP_RX_CTRL_FB_RX_FIFO_DEPTH_2_1,
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};
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static const struct bcmasp_plat_data v21_plat_data = {
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.init_wol = bcmasp_init_wol_shared,
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.enable_wol = bcmasp_enable_wol_shared,
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.destroy_wol = bcmasp_wol_irq_destroy_shared,
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.core_clock_select = bcmasp_core_clock_select_one,
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.hw_info = &v21_hw_info,
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};
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static const struct bcmasp_plat_data v22_plat_data = {
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.init_wol = bcmasp_init_wol_shared,
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.enable_wol = bcmasp_enable_wol_shared,
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.destroy_wol = bcmasp_wol_irq_destroy_shared,
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.core_clock_select = bcmasp_core_clock_select_many,
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.hw_info = &v21_hw_info,
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.eee_fixup = bcmasp_eee_fixup,
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};
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static void bcmasp_set_pdata(struct bcmasp_priv *priv, const struct bcmasp_plat_data *pdata)
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{
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priv->init_wol = pdata->init_wol;
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priv->enable_wol = pdata->enable_wol;
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priv->destroy_wol = pdata->destroy_wol;
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priv->core_clock_select = pdata->core_clock_select;
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priv->eee_fixup = pdata->eee_fixup;
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priv->hw_info = pdata->hw_info;
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}
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static const struct of_device_id bcmasp_of_match[] = {
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{ .compatible = "brcm,asp-v2.0", .data = &v20_plat_data },
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{ .compatible = "brcm,asp-v2.1", .data = &v21_plat_data },
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{ .compatible = "brcm,asp-v2.2", .data = &v22_plat_data },
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{ /* sentinel */ },
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@ -1281,9 +1201,8 @@ static const struct of_device_id bcmasp_of_match[] = {
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MODULE_DEVICE_TABLE(of, bcmasp_of_match);
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static const struct of_device_id bcmasp_mdio_of_match[] = {
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{ .compatible = "brcm,asp-v2.2-mdio", },
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{ .compatible = "brcm,asp-v2.1-mdio", },
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{ .compatible = "brcm,asp-v2.0-mdio", },
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{ .compatible = "brcm,asp-v2.2-mdio", },
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, bcmasp_mdio_of_match);
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@ -1387,7 +1306,7 @@ static int bcmasp_probe(struct platform_device *pdev)
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}
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/* Check and enable WoL */
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priv->init_wol(priv);
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bcmasp_init_wol(priv);
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/* Drop the clock reference count now and let ndo_open()/ndo_close()
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* manage it for us from now on.
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@ -1404,7 +1323,7 @@ static int bcmasp_probe(struct platform_device *pdev)
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if (ret) {
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netdev_err(intf->ndev,
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"failed to register net_device: %d\n", ret);
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priv->destroy_wol(priv);
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bcmasp_wol_irq_destroy(priv);
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bcmasp_remove_intfs(priv);
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goto of_put_exit;
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}
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@ -1425,7 +1344,7 @@ static void bcmasp_remove(struct platform_device *pdev)
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if (!priv)
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return;
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priv->destroy_wol(priv);
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bcmasp_wol_irq_destroy(priv);
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bcmasp_remove_intfs(priv);
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}
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@ -53,22 +53,15 @@
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#define ASP_RX_CTRL_FB_0_FRAME_COUNT 0x14
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#define ASP_RX_CTRL_FB_1_FRAME_COUNT 0x18
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#define ASP_RX_CTRL_FB_8_FRAME_COUNT 0x1c
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/* asp2.1 diverges offsets here */
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/* ASP2.0 */
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#define ASP_RX_CTRL_FB_OUT_FRAME_COUNT 0x20
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#define ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT 0x24
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#define ASP_RX_CTRL_FLUSH 0x28
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#define ASP_CTRL_UMAC0_FLUSH_MASK (BIT(0) | BIT(12))
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#define ASP_CTRL_UMAC1_FLUSH_MASK (BIT(1) | BIT(13))
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#define ASP_CTRL_SPB_FLUSH_MASK (BIT(8) | BIT(20))
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#define ASP_RX_CTRL_FB_RX_FIFO_DEPTH 0x30
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/* ASP2.1 */
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#define ASP_RX_CTRL_FB_9_FRAME_COUNT_2_1 0x20
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#define ASP_RX_CTRL_FB_10_FRAME_COUNT_2_1 0x24
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#define ASP_RX_CTRL_FB_OUT_FRAME_COUNT_2_1 0x28
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#define ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT_2_1 0x2c
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#define ASP_RX_CTRL_FLUSH_2_1 0x30
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#define ASP_RX_CTRL_FB_RX_FIFO_DEPTH_2_1 0x38
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#define ASP_RX_CTRL_FB_9_FRAME_COUNT 0x20
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#define ASP_RX_CTRL_FB_10_FRAME_COUNT 0x24
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#define ASP_RX_CTRL_FB_OUT_FRAME_COUNT 0x28
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#define ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT 0x2c
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#define ASP_RX_CTRL_FLUSH 0x30
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#define ASP_CTRL_UMAC0_FLUSH_MASK (BIT(0) | BIT(12))
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#define ASP_CTRL_UMAC1_FLUSH_MASK (BIT(1) | BIT(13))
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#define ASP_CTRL_SPB_FLUSH_MASK (BIT(8) | BIT(20))
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#define ASP_RX_CTRL_FB_RX_FIFO_DEPTH 0x38
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#define ASP_RX_FILTER_OFFSET 0x80000
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#define ASP_RX_FILTER_BLK_CTRL 0x0
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@ -345,9 +338,6 @@ struct bcmasp_intf {
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u32 wolopts;
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u8 sopass[SOPASS_MAX];
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/* Used if per intf wol irq */
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int wol_irq;
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unsigned int wol_irq_enabled:1;
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};
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#define NUM_NET_FILTERS 32
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@ -370,21 +360,9 @@ struct bcmasp_mda_filter {
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u8 mask[ETH_ALEN];
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};
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struct bcmasp_hw_info {
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u32 rx_ctrl_flush;
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u32 umac2fb;
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u32 rx_ctrl_fb_out_frame_count;
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u32 rx_ctrl_fb_filt_out_frame_count;
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u32 rx_ctrl_fb_rx_fifo_depth;
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};
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struct bcmasp_plat_data {
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void (*init_wol)(struct bcmasp_priv *priv);
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void (*enable_wol)(struct bcmasp_intf *intf, bool en);
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void (*destroy_wol)(struct bcmasp_priv *priv);
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void (*core_clock_select)(struct bcmasp_priv *priv, bool slow);
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void (*eee_fixup)(struct bcmasp_intf *priv, bool en);
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struct bcmasp_hw_info *hw_info;
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};
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struct bcmasp_priv {
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@ -399,14 +377,10 @@ struct bcmasp_priv {
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int wol_irq;
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unsigned long wol_irq_enabled_mask;
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void (*init_wol)(struct bcmasp_priv *priv);
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void (*enable_wol)(struct bcmasp_intf *intf, bool en);
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void (*destroy_wol)(struct bcmasp_priv *priv);
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void (*core_clock_select)(struct bcmasp_priv *priv, bool slow);
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void (*eee_fixup)(struct bcmasp_intf *intf, bool en);
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void __iomem *base;
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struct bcmasp_hw_info *hw_info;
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struct list_head intfs;
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@ -599,4 +573,5 @@ int bcmasp_netfilt_get_all_active(struct bcmasp_intf *intf, u32 *rule_locs,
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void bcmasp_netfilt_suspend(struct bcmasp_intf *intf);
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void bcmasp_enable_wol(struct bcmasp_intf *intf, bool en);
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#endif
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@ -71,23 +71,6 @@ static const struct bcmasp_stats bcmasp_gstrings_stats[] = {
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#define BCMASP_STATS_LEN ARRAY_SIZE(bcmasp_gstrings_stats)
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static u16 bcmasp_stat_fixup_offset(struct bcmasp_intf *intf,
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const struct bcmasp_stats *s)
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{
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struct bcmasp_priv *priv = intf->parent;
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if (!strcmp("Frames Out(Buffer)", s->stat_string))
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return priv->hw_info->rx_ctrl_fb_out_frame_count;
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if (!strcmp("Frames Out(Filters)", s->stat_string))
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return priv->hw_info->rx_ctrl_fb_filt_out_frame_count;
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if (!strcmp("RX Buffer FIFO Depth", s->stat_string))
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return priv->hw_info->rx_ctrl_fb_rx_fifo_depth;
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return s->reg_offset;
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}
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static int bcmasp_get_sset_count(struct net_device *dev, int string_set)
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{
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switch (string_set) {
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@ -126,7 +109,7 @@ static void bcmasp_update_mib_counters(struct bcmasp_intf *intf)
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char *p;
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s = &bcmasp_gstrings_stats[i];
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offset = bcmasp_stat_fixup_offset(intf, s);
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offset = s->reg_offset;
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switch (s->type) {
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case BCMASP_STAT_SOFT:
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continue;
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@ -215,7 +198,7 @@ static int bcmasp_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
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memcpy(intf->sopass, wol->sopass, sizeof(wol->sopass));
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mutex_lock(&priv->wol_lock);
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priv->enable_wol(intf, !!intf->wolopts);
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bcmasp_enable_wol(intf, !!intf->wolopts);
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mutex_unlock(&priv->wol_lock);
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return 0;
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@ -1185,7 +1185,7 @@ static void bcmasp_map_res(struct bcmasp_priv *priv, struct bcmasp_intf *intf)
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{
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/* Per port */
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intf->res.umac = priv->base + UMC_OFFSET(intf);
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intf->res.umac2fb = priv->base + (priv->hw_info->umac2fb +
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intf->res.umac2fb = priv->base + (UMAC2FB_OFFSET +
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(intf->port * 0x4));
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intf->res.rgmii = priv->base + RGMII_OFFSET(intf);
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@ -118,8 +118,7 @@
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#define UMC_PSW_MS 0x624
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#define UMC_PSW_LS 0x628
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#define UMAC2FB_OFFSET_2_1 0x9f044
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#define UMAC2FB_OFFSET 0x9f03c
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#define UMAC2FB_OFFSET 0x9f044
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#define UMAC2FB_CFG 0x0
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#define UMAC2FB_CFG_OPUT_EN BIT(0)
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#define UMAC2FB_CFG_VLAN_EN BIT(1)
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