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dmaengine: idxd: assign all engines to group 0 in IAA defaults

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The IAA device defaults only assigned engine 0 to group 0, leaving
engines 1 through max_engines-1 unassigned (group_id = -1). This means
that by default only a single engine processed descriptors, limiting
throughput to one engine's capacity.

Assign all available engines to group 0 so that the full hardware
parallelism is used out of the box without requiring manual
accel-config setup.

Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Link: https://patch.msgid.link/20260805-iaa-crypto-fixes-zswap-v2-1-55c02694f499@intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Giovanni Cabiddu 2026-08-05 14:19:22 -07:00 committed by Vinod Koul
parent 04b8c3de13
commit 4a8b792955
1 changed files with 7 additions and 5 deletions
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12
drivers/dma/idxd/defaults.c
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@ -8,6 +8,7 @@ int idxd_load_iaa_device_defaults(struct idxd_device *idxd)
struct idxd_engine *engine;
struct idxd_group *group;
struct idxd_wq *wq;
int i;
if (!test_bit(IDXD_FLAG_CONFIGURABLE, &idxd->flags))
return 0;
@ -41,11 +42,12 @@ int idxd_load_iaa_device_defaults(struct idxd_device *idxd)
/* set driver_name to "crypto" */
strscpy_pad(wq->driver_name, "crypto");
engine = idxd->engines[0];
/* set engine group to 0 */
engine->group = idxd->groups[0];
engine->group->num_engines++;
/* assign all engines to group 0 */
for (i = 0; i < idxd->max_engines; i++) {
engine = idxd->engines[i];
engine->group = group;
group->num_engines++;
}
return 0;
}