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drm/amdgpu: Add pcie64 extended to register block

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Add extended pcie 64-bit access method to register access block.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar 2025-12-09 11:28:45 +05:30 committed by Alex Deucher
parent 74b9c49e6d
commit 4a6ab03731
6 changed files with 34 additions and 29 deletions
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6
drivers/gpu/drm/amd/amdgpu/amdgpu.h
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@ -904,8 +904,6 @@ struct amdgpu_device {
struct amdgpu_reg_access reg;
/* protects concurrent PCIE register access */
spinlock_t pcie_idx_lock;
amdgpu_rreg64_ext_t pcie_rreg64_ext;
amdgpu_wreg64_ext_t pcie_wreg64_ext;
struct amdgpu_doorbell doorbell;
/* clock/pll info */
@ -1308,8 +1306,8 @@ int emu_soc_asic_init(struct amdgpu_device *adev);
#define WREG32_PCIE_EXT(reg, v) amdgpu_reg_pcie_ext_wr32(adev, (reg), (v))
#define RREG64_PCIE(reg) amdgpu_reg_pcie_rd64(adev, (reg))
#define WREG64_PCIE(reg, v) amdgpu_reg_pcie_wr64(adev, (reg), (v))
#define RREG64_PCIE_EXT(reg) adev->pcie_rreg64_ext(adev, (reg))
#define WREG64_PCIE_EXT(reg, v) adev->pcie_wreg64_ext(adev, (reg), (v))
#define RREG64_PCIE_EXT(reg) amdgpu_reg_pcie_ext_rd64(adev, (reg))
#define WREG64_PCIE_EXT(reg, v) amdgpu_reg_pcie_ext_wr64(adev, (reg), (v))
#define RREG32_SMC(reg) amdgpu_reg_smc_rd32(adev, (reg))
#define WREG32_SMC(reg, v) amdgpu_reg_smc_wr32(adev, (reg), (v))
#define RREG32_UVD_CTX(reg) amdgpu_reg_uvd_ctx_rd32(adev, (reg))

18
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
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@ -858,21 +858,6 @@ u32 amdgpu_device_get_rev_id(struct amdgpu_device *adev)
return adev->nbio.funcs->get_rev_id(adev);
}
static uint64_t amdgpu_invalid_rreg64_ext(struct amdgpu_device *adev, uint64_t reg)
{
dev_err(adev->dev, "Invalid callback to read register 0x%llX\n", reg);
BUG();
return 0;
}
static void amdgpu_invalid_wreg64_ext(struct amdgpu_device *adev, uint64_t reg, uint64_t v)
{
dev_err(adev->dev,
"Invalid callback to write 64 bit register 0x%llX with 0x%08llX\n",
reg, v);
BUG();
}
static uint32_t amdgpu_device_get_vbios_flags(struct amdgpu_device *adev)
{
if (hweight32(adev->aid_mask) && (adev->flags & AMD_IS_APU))
@ -3704,9 +3689,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
amdgpu_reg_access_init(adev);
adev->pcie_rreg64_ext = &amdgpu_invalid_rreg64_ext;
adev->pcie_wreg64_ext = &amdgpu_invalid_wreg64_ext;
dev_info(
adev->dev,
"initializing kernel modesetting (%s 0x%04X:0x%04X 0x%04X:0x%04X 0x%02X).\n",

21
drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c
View File

@ -65,6 +65,8 @@ void amdgpu_reg_access_init(struct amdgpu_device *adev)
adev->reg.pcie.wreg_ext = NULL;
adev->reg.pcie.rreg64 = NULL;
adev->reg.pcie.wreg64 = NULL;
adev->reg.pcie.rreg64_ext = NULL;
adev->reg.pcie.wreg64_ext = NULL;
adev->reg.pcie.port_rreg = NULL;
adev->reg.pcie.port_wreg = NULL;
}
@ -243,6 +245,25 @@ void amdgpu_reg_pcie_wr64(struct amdgpu_device *adev, uint32_t reg, uint64_t v)
adev->reg.pcie.wreg64(adev, reg, v);
}
uint64_t amdgpu_reg_pcie_ext_rd64(struct amdgpu_device *adev, uint64_t reg)
{
if (!adev->reg.pcie.rreg64_ext) {
dev_err_once(adev->dev, "PCIE EXT 64-bit register read not supported\n");
return 0;
}
return adev->reg.pcie.rreg64_ext(adev, reg);
}
void amdgpu_reg_pcie_ext_wr64(struct amdgpu_device *adev, uint64_t reg,
uint64_t v)
{
if (!adev->reg.pcie.wreg64_ext) {
dev_err_once(adev->dev, "PCIE EXT 64-bit register write not supported\n");
return;
}
adev->reg.pcie.wreg64_ext(adev, reg, v);
}
uint32_t amdgpu_reg_pciep_rd32(struct amdgpu_device *adev, uint32_t reg)
{
if (!adev->reg.pcie.port_rreg) {

10
drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h
View File

@ -35,6 +35,8 @@ typedef uint32_t (*amdgpu_rreg_ext_t)(struct amdgpu_device *, uint64_t);
typedef void (*amdgpu_wreg_ext_t)(struct amdgpu_device *, uint64_t, uint32_t);
typedef uint64_t (*amdgpu_rreg64_t)(struct amdgpu_device *, uint32_t);
typedef void (*amdgpu_wreg64_t)(struct amdgpu_device *, uint32_t, uint64_t);
typedef uint64_t (*amdgpu_rreg64_ext_t)(struct amdgpu_device *, uint64_t);
typedef void (*amdgpu_wreg64_ext_t)(struct amdgpu_device *, uint64_t, uint64_t);
typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device *, uint32_t,
uint32_t);
@ -60,6 +62,8 @@ struct amdgpu_reg_pcie_ind {
amdgpu_wreg_ext_t wreg_ext;
amdgpu_rreg64_t rreg64;
amdgpu_wreg64_t wreg64;
amdgpu_rreg64_ext_t rreg64_ext;
amdgpu_wreg64_ext_t wreg64_ext;
amdgpu_rreg_t port_rreg;
amdgpu_wreg_t port_wreg;
};
@ -98,13 +102,13 @@ void amdgpu_reg_pcie_ext_wr32(struct amdgpu_device *adev, uint64_t reg,
uint32_t v);
uint64_t amdgpu_reg_pcie_rd64(struct amdgpu_device *adev, uint32_t reg);
void amdgpu_reg_pcie_wr64(struct amdgpu_device *adev, uint32_t reg, uint64_t v);
uint64_t amdgpu_reg_pcie_ext_rd64(struct amdgpu_device *adev, uint64_t reg);
void amdgpu_reg_pcie_ext_wr64(struct amdgpu_device *adev, uint64_t reg,
uint64_t v);
uint32_t amdgpu_reg_pciep_rd32(struct amdgpu_device *adev, uint32_t reg);
void amdgpu_reg_pciep_wr32(struct amdgpu_device *adev, uint32_t reg,
uint32_t v);
typedef uint64_t (*amdgpu_rreg64_ext_t)(struct amdgpu_device *, uint64_t);
typedef void (*amdgpu_wreg64_ext_t)(struct amdgpu_device *, uint64_t, uint64_t);
uint32_t amdgpu_device_rreg(struct amdgpu_device *adev, uint32_t reg,
uint32_t acc_flags);
uint32_t amdgpu_device_xcc_rreg(struct amdgpu_device *adev, uint32_t reg,

4
drivers/gpu/drm/amd/amdgpu/soc15.c
View File

@ -967,8 +967,8 @@ static int soc15_common_early_init(struct amdgpu_ip_block *ip_block)
adev->reg.pcie.wreg_ext = &amdgpu_device_indirect_wreg_ext;
adev->reg.pcie.rreg64 = &amdgpu_device_indirect_rreg64;
adev->reg.pcie.wreg64 = &amdgpu_device_indirect_wreg64;
adev->pcie_rreg64_ext = &amdgpu_device_indirect_rreg64_ext;
adev->pcie_wreg64_ext = &amdgpu_device_indirect_wreg64_ext;
adev->reg.pcie.rreg64_ext = &amdgpu_device_indirect_rreg64_ext;
adev->reg.pcie.wreg64_ext = &amdgpu_device_indirect_wreg64_ext;
adev->reg.uvd_ctx.rreg = &soc15_uvd_ctx_rreg;
adev->reg.uvd_ctx.wreg = &soc15_uvd_ctx_wreg;
adev->reg.didt.rreg = &soc15_didt_rreg;

4
drivers/gpu/drm/amd/amdgpu/soc_v1_0.c
View File

@ -258,8 +258,8 @@ static int soc_v1_0_common_early_init(struct amdgpu_ip_block *ip_block)
adev->reg.pcie.wreg64 = &amdgpu_device_indirect_wreg64;
adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;
adev->reg.pcie.port_wreg = &amdgpu_device_pcie_port_wreg;
adev->pcie_rreg64_ext = &amdgpu_device_indirect_rreg64_ext;
adev->pcie_wreg64_ext = &amdgpu_device_indirect_wreg64_ext;
adev->reg.pcie.rreg64_ext = &amdgpu_device_indirect_rreg64_ext;
adev->reg.pcie.wreg64_ext = &amdgpu_device_indirect_wreg64_ext;
adev->asic_funcs = &soc_v1_0_asic_funcs;