arm64: dts: imx8mp-phyboard-pollux: Add support for RS232/RS485

Add UART2 for RS232/RS485 support.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
(Updated the node by not setting the reserved bits(BIT 0 and BIT 3)
and enabled internal pullup for RX and TX.)
Signed-off-by: Yashwanth Varakala <y.varakala@phytec.de>
Signed-off-by: Cem Tenruh <c.tenruh@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Teresa Remmet 2023-09-06 12:08:57 +02:00 committed by Shawn Guo
parent 3bd7fdcc35
commit 4a58fcdb18

View File

@ -177,6 +177,16 @@ &usb_dwc3_1 {
status = "okay";
};
/* RS232/RS485 */
&uart2 {
assigned-clocks = <&clk IMX8MP_CLK_UART2>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
uart-has-rtscts;
status = "okay";
};
/* SD-Card */
&usdhc2 {
assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
@ -298,6 +308,15 @@ MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x10
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140
MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140
MX8MP_IOMUXC_SAI3_RXC__UART2_DCE_CTS 0x140
MX8MP_IOMUXC_SAI3_RXD__UART2_DCE_RTS 0x140
>;
};
pinctrl_usdhc2_pins: usdhc2-gpiogrp {
fsl,pins = <
MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4