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drm/i915: Dump w/a lists on all engines
We store separate wa_list on every engine, so be sure to include all when dumping the current set via debugfs. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190703135805.7310-1-chris@chris-wilson.co.uk
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@ -2960,14 +2960,28 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused)
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static int i915_wa_registers(struct seq_file *m, void *unused)
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{
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struct drm_i915_private *i915 = node_to_i915(m->private);
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const struct i915_wa_list *wal = &i915->engine[RCS0]->ctx_wa_list;
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struct i915_wa *wa;
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unsigned int i;
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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seq_printf(m, "Workarounds applied: %u\n", wal->count);
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for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
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seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X\n",
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i915_mmio_reg_offset(wa->reg), wa->val, wa->mask);
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for_each_engine(engine, i915, id) {
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const struct i915_wa_list *wal = &engine->ctx_wa_list;
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const struct i915_wa *wa;
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unsigned int count;
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count = wal->count;
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if (!count)
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continue;
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seq_printf(m, "%s: Workarounds applied: %u\n",
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engine->name, count);
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for (wa = wal->list; count--; wa++)
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seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X\n",
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i915_mmio_reg_offset(wa->reg),
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wa->val, wa->mask);
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seq_printf(m, "\n");
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}
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return 0;
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}
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