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drm/amd/display: Update NV1x SR latency values

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[Why]
HW team measurement requires updating values

[How]
Update bounding box values

Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alvin Lee 2020-09-25 10:54:47 -04:00 committed by Alex Deucher
parent c220ba6f62
commit 4a3dea8932
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
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@ -298,8 +298,8 @@ static struct _vcs_dpi_soc_bounding_box_st dcn2_0_soc = {
},
},
.num_states = 5,
.sr_exit_time_us = 8.6,
.sr_enter_plus_exit_time_us = 10.9,
.sr_exit_time_us = 11.6,
.sr_enter_plus_exit_time_us = 13.9,
.urgent_latency_us = 4.0,
.urgent_latency_pixel_data_only_us = 4.0,
.urgent_latency_pixel_mixed_with_vm_data_us = 4.0,