dt-bindings: phy: qcs615-qmp-usb3dp: Add support for Shikra SoC

Declare the USB-C QMP PHY present on the Qualcomm Shikra SoC. Shikra uses
3 resets to be programmed before initialising the phy. As per the hardware
documentation, the third reset is PHY_PRIM_SP0_BCR, hence naming it "phy".

Also, add remote endpoints and orientation switch support for getting
Type-C orientation information.

Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260712-usb-shikra-phy-v6-v6-2-1b3e51bf1541@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Krishna Kurapati 2026-07-12 20:58:35 +05:30 committed by Vinod Koul
parent 8d3f1d5ce0
commit 49e3105844

View File

@ -18,6 +18,7 @@ properties:
compatible:
enum:
- qcom,qcs615-qmp-usb3-dp-phy
- qcom,shikra-qmp-usb3-dp-phy
reg:
maxItems: 1
@ -33,12 +34,15 @@ properties:
- const: pipe
resets:
maxItems: 2
minItems: 2
maxItems: 3
reset-names:
minItems: 2
items:
- const: phy_phy
- const: dp_phy
- const: phy
vdda-phy-supply: true
@ -63,6 +67,22 @@ properties:
- description: offset of the PHY mode register
description: Clamp and PHY mode register present in the TCSR
orientation-switch:
description:
Flag the PHY as possible handler of USB Type-C orientation switching
type: boolean
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description: Output endpoint of the PHY
port@1:
$ref: /schemas/graph.yaml#/properties/port
description: Incoming endpoint from the USB controller
required:
- compatible
- reg
@ -78,6 +98,33 @@ required:
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
enum:
- qcom,shikra-qmp-usb3-dp-phy
then:
properties:
resets:
minItems: 3
reset-names:
minItems: 3
- if:
properties:
compatible:
contains:
enum:
- qcom,qcs615-qmp-usb3-dp-phy
then:
properties:
resets:
maxItems: 2
reset-names:
maxItems: 2
examples:
- |
#include <dt-bindings/clock/qcom,qcs615-gcc.h>