diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 0b257a07792f..03e054c0bac4 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -357,6 +357,8 @@ mmc3: mmc@1c12000 { clock-names = "ahb", "mmc"; resets = <&ccu RST_BUS_MMC3>; reset-names = "ahb"; + pinctrl-0 = <&mmc3_pins>; + pinctrl-names = "default"; interrupts = ; status = "disabled"; #address-cells = <1>; @@ -601,6 +603,15 @@ mmc2_pins: mmc2-pins { bias-pull-up; }; + /omit-if-no-ref/ + mmc3_pins: mmc3-pins { + pins = "PI4", "PI5", "PI6", + "PI7", "PI8", "PI9"; + function = "mmc3"; + drive-strength = <30>; + bias-pull-up; + }; + /omit-if-no-ref/ spi0_pc_pins: spi0-pc-pins { pins = "PC0", "PC1", "PC2"; @@ -637,6 +648,18 @@ uart0_pb_pins: uart0-pb-pins { function = "uart0"; }; + /omit-if-no-ref/ + uart2_pi_pins: uart2-pi-pins { + pins = "PI18", "PI19"; + function = "uart2"; + }; + + /omit-if-no-ref/ + uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{ + pins = "PI16", "PI17"; + function = "uart2"; + }; + /omit-if-no-ref/ uart3_pg_pins: uart3-pg-pins { pins = "PG6", "PG7"; @@ -648,6 +671,24 @@ uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins { pins = "PG8", "PG9"; function = "uart3"; }; + + /omit-if-no-ref/ + uart4_pg_pins: uart4-pg-pins { + pins = "PG10", "PG11"; + function = "uart4"; + }; + + /omit-if-no-ref/ + uart5_ph_pins: uart5-ph-pins { + pins = "PH6", "PH7"; + function = "uart5"; + }; + + /omit-if-no-ref/ + uart7_pi_pins: uart7-pi-pins { + pins = "PI20", "PI21"; + function = "uart7"; + }; }; wdt: watchdog@1c20c90 {