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iio: adc: qcom-spmi-adc5-gen3: Fix some indentation
Fix the indentation to keep it uniform and readable. Change-Id: I73da8941c72857a9f63dca3e8085873413b3a1f2 Signed-off-by: Subbaraman Narayanamurthy <quic_subbaram@quicinc.com>
This commit is contained in:
Subbaraman Narayanamurthy
David Collins
parent
0801e19f08
commit
48efaf8e96
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@ -175,33 +175,33 @@ struct adc5_base_data {
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* @high_thr_voltage: upper threshold voltage for TM.
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* @low_thr_voltage: lower threshold voltage for TM.
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* @last_temp: last temperature that caused threshold violation,
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* or a thermal TM channel.
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* or a thermal TM channel.
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* @last_temp_set: indicates if last_temp is stored.
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* @req_wq: workqueue holding queued notification tasks for a non-thermal
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* TM channel.
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* TM channel.
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* @work: scheduled work for handling non-thermal TM client notification.
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* @thr_list: list of client thresholds configured for non-thermal TM channel.
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* @adc_rscale_fn: reverse scaling function to convert voltage to raw code
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* for non-thermal TM channels.
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* for non-thermal TM channels.
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*/
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struct adc5_channel_prop {
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unsigned int channel;
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enum adc5_cal_method cal_method;
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unsigned int decimation;
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unsigned int sid;
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unsigned int prescale;
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unsigned int hw_settle_time;
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unsigned int avg_samples;
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unsigned int sdam_index;
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unsigned int channel;
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enum adc5_cal_method cal_method;
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unsigned int decimation;
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unsigned int sid;
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unsigned int prescale;
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unsigned int hw_settle_time;
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unsigned int avg_samples;
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unsigned int sdam_index;
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enum vadc_scale_fn_type scale_fn_type;
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const char *datasheet_name;
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enum vadc_scale_fn_type scale_fn_type;
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const char *datasheet_name;
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struct adc5_chip *chip;
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/* TM properties */
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int adc_tm;
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unsigned int tm_chan_index;
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unsigned int timer;
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int adc_tm;
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unsigned int tm_chan_index;
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unsigned int timer;
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struct thermal_zone_device *tzd;
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int high_thr_en;
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int low_thr_en;
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@ -209,8 +209,8 @@ struct adc5_channel_prop {
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bool low_thr_triggered;
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int64_t high_thr_voltage;
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int64_t low_thr_voltage;
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int last_temp;
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bool last_temp_set;
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int last_temp;
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bool last_temp_set;
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struct workqueue_struct *req_wq;
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struct work_struct work;
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struct list_head thr_list;
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@ -223,7 +223,7 @@ struct adc5_channel_prop {
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* @dev: SPMI ADC5 device.
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* @base: pointer to array of ADC peripheral base and interrupt.
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* @debug_base: base address for the reserved ADC peripheral,
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* to dump for debug purposes alone.
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* to dump for debug purposes alone.
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* @num_sdams: number of SDAMs being used.
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* @nchannels: number of ADC channels.
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* @chan_props: array of ADC channel properties.
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@ -231,28 +231,28 @@ struct adc5_channel_prop {
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* @complete: ADC result notification after interrupt is received.
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* @lock: ADC lock for access to the peripheral.
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* @data: software configuration data.
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* @n_tm_channels: number of ADC channels used for TM measurements.
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* @list: list item, used to add this device to gloal list of ADC_TM devices.
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* @device_list: pointer to list of ADC_TM devices.
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* @n_tm_channels: number of ADC channels used for TM measurements.
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* @tm_handler_work: scheduled work for handling TM threshold violation.
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*/
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struct adc5_chip {
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struct regmap *regmap;
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struct device *dev;
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struct adc5_base_data *base;
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u16 debug_base;
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unsigned int num_sdams;
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unsigned int nchannels;
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struct regmap *regmap;
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struct device *dev;
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struct adc5_base_data *base;
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u16 debug_base;
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unsigned int num_sdams;
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unsigned int nchannels;
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struct adc5_channel_prop *chan_props;
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struct iio_chan_spec *iio_chans;
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struct completion complete;
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struct mutex lock;
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const struct adc5_data *data;
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struct iio_chan_spec *iio_chans;
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struct completion complete;
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struct mutex lock;
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const struct adc5_data *data;
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/* TM properties */
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unsigned int n_tm_channels;
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unsigned int n_tm_channels;
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struct list_head list;
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struct list_head *device_list;
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struct work_struct tm_handler_work;
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struct work_struct tm_handler_work;
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};
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static const struct u32_fract adc5_prescale_ratios[] = {
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@ -424,7 +424,7 @@ static int adc5_gen3_configure(struct adc5_chip *adc,
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#define ADC5_GEN3_HS_DELAY_MIN_US 100
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#define ADC5_GEN3_HS_DELAY_MAX_US 110
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#define ADC5_GEN3_HS_RETRY_COUNT 20
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#define ADC5_GEN3_HS_RETRY_COUNT 20
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static int adc5_gen3_poll_wait_hs(struct adc5_chip *adc, struct adc5_channel_prop *prop)
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{
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@ -511,8 +511,8 @@ static int adc5_gen3_do_conversion(struct adc5_chip *adc,
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return ret;
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}
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#define ADC_OFFSET_DUMP 8
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#define ADC_SDAM_REG_DUMP 32
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#define ADC_OFFSET_DUMP 8
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#define ADC_SDAM_REG_DUMP 32
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static void adc5_gen3_dump_register(struct adc5_chip *adc, unsigned int offset)
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{
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int i, rc;
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@ -1379,51 +1379,51 @@ struct adc5_channels {
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static const struct adc5_channels adc5_chans_pmic[ADC5_MAX_CHANNEL] = {
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[ADC5_GEN3_OFFSET_REF] = ADC5_CHAN_VOLT("ref_gnd", 0,
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SCALE_HW_CALIB_DEFAULT)
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SCALE_HW_CALIB_DEFAULT)
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[ADC5_GEN3_1P25VREF] = ADC5_CHAN_VOLT("vref_1p25", 0,
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SCALE_HW_CALIB_DEFAULT)
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SCALE_HW_CALIB_DEFAULT)
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[ADC5_GEN3_VPH_PWR] = ADC5_CHAN_VOLT("vph_pwr", 1,
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SCALE_HW_CALIB_DEFAULT)
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[ADC5_GEN3_VBAT_SNS_QBG] = ADC5_CHAN_VOLT("vbat_sns", 1,
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SCALE_HW_CALIB_DEFAULT)
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[ADC5_GEN3_AMUX3_THM] = ADC5_CHAN_TEMP("smb_temp", 0,
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SCALE_HW_CALIB_PM7_SMB_TEMP)
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SCALE_HW_CALIB_DEFAULT)
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[ADC5_GEN3_VBAT_SNS_QBG] = ADC5_CHAN_VOLT("vbat_sns", 1,
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SCALE_HW_CALIB_DEFAULT)
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[ADC5_GEN3_AMUX3_THM] = ADC5_CHAN_TEMP("smb_temp", 0,
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SCALE_HW_CALIB_PM7_SMB_TEMP)
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[ADC5_GEN3_CHG_TEMP] = ADC5_CHAN_TEMP("chg_temp", 0,
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SCALE_HW_CALIB_PM7_CHG_TEMP)
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SCALE_HW_CALIB_PM7_CHG_TEMP)
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[ADC5_GEN3_USB_SNS_V_16] = ADC5_CHAN_TEMP("usb_sns_v_div_16", 3,
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SCALE_HW_CALIB_DEFAULT)
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SCALE_HW_CALIB_DEFAULT)
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[ADC5_GEN3_VIN_DIV16_MUX] = ADC5_CHAN_TEMP("vin_div_16", 3,
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SCALE_HW_CALIB_DEFAULT)
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SCALE_HW_CALIB_DEFAULT)
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[ADC5_GEN3_IIN_FB] = ADC5_CHAN_CUR("iin_fb", 4,
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SCALE_HW_CALIB_CUR)
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SCALE_HW_CALIB_CUR)
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[ADC5_GEN3_ICHG_SMB] = ADC5_CHAN_CUR("ichg_smb", 5,
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SCALE_HW_CALIB_CUR)
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SCALE_HW_CALIB_CUR)
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[ADC5_GEN3_IIN_SMB] = ADC5_CHAN_CUR("iin_smb", 6,
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SCALE_HW_CALIB_CUR)
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SCALE_HW_CALIB_CUR)
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[ADC5_GEN3_ICHG_FB] = ADC5_CHAN_CUR("ichg_fb", 7,
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SCALE_HW_CALIB_CUR_RAW)
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SCALE_HW_CALIB_CUR_RAW)
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[ADC5_GEN3_DIE_TEMP] = ADC5_CHAN_TEMP("die_temp", 0,
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SCALE_HW_CALIB_PMIC_THERM_PM7)
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SCALE_HW_CALIB_PMIC_THERM_PM7)
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[ADC5_GEN3_AMUX1_THM_100K_PU] = ADC5_CHAN_TEMP("amux_thm1_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC5_GEN3_AMUX2_THM_100K_PU] = ADC5_CHAN_TEMP("amux_thm2_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC5_GEN3_AMUX3_THM_100K_PU] = ADC5_CHAN_TEMP("amux_thm3_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC5_GEN3_AMUX4_THM_100K_PU] = ADC5_CHAN_TEMP("amux_thm4_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC5_GEN3_AMUX5_THM_100K_PU] = ADC5_CHAN_TEMP("amux_thm5_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC5_GEN3_AMUX6_THM_100K_PU] = ADC5_CHAN_TEMP("amux_thm6_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC5_GEN3_AMUX1_GPIO_100K_PU] = ADC5_CHAN_TEMP("amux1_gpio_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC5_GEN3_AMUX2_GPIO_100K_PU] = ADC5_CHAN_TEMP("amux2_gpio_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC5_GEN3_AMUX3_GPIO_100K_PU] = ADC5_CHAN_TEMP("amux3_gpio_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC5_GEN3_AMUX4_GPIO_100K_PU] = ADC5_CHAN_TEMP("amux4_gpio_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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};
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static int adc5_get_dt_channel_data(struct adc5_chip *adc,
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