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net: phy: nxp-c45-tja11xx: add TJA112XB SGMII PCS restart errata
TJA1120B/TJA1121B can achieve a stable operation of SGMII after
a startup event by putting the SGMII PCS into power down mode and
restart afterwards.
It is necessary to put the SGMII PCS into power down mode and back up.
Cc: stable@vger.kernel.org
Fixes: f1fe5dff2b ("net: phy: nxp-c45-tja11xx: add TJA1120 support")
Signed-off-by: Andrei Botila <andrei.botila@oss.nxp.com>
Link: https://patch.msgid.link/20250304160619.181046-3-andrei.botila@oss.nxp.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
parent
a07364b394
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@ -114,6 +114,9 @@
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#define MII_BASIC_CONFIG_RMII 0x5
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#define MII_BASIC_CONFIG_MII 0x4
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#define VEND1_SGMII_BASIC_CONTROL 0xB000
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#define SGMII_LPM BIT(11)
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#define VEND1_SYMBOL_ERROR_CNT_XTD 0x8351
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#define EXTENDED_CNT_EN BIT(15)
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#define VEND1_MONITOR_STATUS 0xAC80
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@ -1598,11 +1601,11 @@ static int nxp_c45_set_phy_mode(struct phy_device *phydev)
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return 0;
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}
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/* Errata: ES_TJA1120 and ES_TJA1121 Rev. 1.0 — 28 November 2024 Section 3.1 */
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/* Errata: ES_TJA1120 and ES_TJA1121 Rev. 1.0 — 28 November 2024 Section 3.1 & 3.2 */
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static void nxp_c45_tja1120_errata(struct phy_device *phydev)
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{
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bool macsec_ability, sgmii_ability;
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int silicon_version, sample_type;
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bool macsec_ability;
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int phy_abilities;
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int ret = 0;
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@ -1619,6 +1622,7 @@ static void nxp_c45_tja1120_errata(struct phy_device *phydev)
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phy_abilities = phy_read_mmd(phydev, MDIO_MMD_VEND1,
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VEND1_PORT_ABILITIES);
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macsec_ability = !!(phy_abilities & MACSEC_ABILITY);
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sgmii_ability = !!(phy_abilities & SGMII_ABILITY);
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if ((!macsec_ability && silicon_version == 2) ||
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(macsec_ability && silicon_version == 1)) {
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/* TJA1120/TJA1121 PHY configuration errata workaround.
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@ -1639,6 +1643,18 @@ static void nxp_c45_tja1120_errata(struct phy_device *phydev)
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phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F8, 0x0);
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phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F9, 0x0);
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if (sgmii_ability) {
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/* TJA1120B/TJA1121B SGMII PCS restart errata workaround.
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* Put SGMII PCS into power down mode and back up.
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*/
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phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
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VEND1_SGMII_BASIC_CONTROL,
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SGMII_LPM);
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phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
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VEND1_SGMII_BASIC_CONTROL,
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SGMII_LPM);
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}
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}
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}
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