drm/amdgpu: Add xgmi speed/width related info

Add APIs to initialize XGMI speed, width details and get to max
bandwidth supported. It is assumed that a device only supports same
generation of XGMI links with uniform width.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar 2025-02-06 17:24:51 +05:30 committed by Alex Deucher
parent 6f16d101da
commit 485993e2f1
2 changed files with 34 additions and 0 deletions

View File

@ -1722,3 +1722,26 @@ bool amdgpu_xgmi_same_hive(struct amdgpu_device *adev,
adev->gmc.xgmi.hive_id &&
adev->gmc.xgmi.hive_id == bo_adev->gmc.xgmi.hive_id);
}
void amdgpu_xgmi_early_init(struct amdgpu_device *adev)
{
if (!adev->gmc.xgmi.supported)
return;
switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
case IP_VERSION(9, 4, 0):
case IP_VERSION(9, 4, 1):
case IP_VERSION(9, 4, 2):
adev->gmc.xgmi.max_speed = XGMI_SPEED_25GT;
adev->gmc.xgmi.max_width = 16;
break;
case IP_VERSION(9, 4, 3):
case IP_VERSION(9, 4, 4):
case IP_VERSION(9, 5, 0):
adev->gmc.xgmi.max_speed = XGMI_SPEED_32GT;
adev->gmc.xgmi.max_width = 16;
break;
default:
break;
}
}

View File

@ -25,6 +25,12 @@
#include <drm/task_barrier.h>
#include "amdgpu_ras.h"
enum amdgpu_xgmi_link_speed {
XGMI_SPEED_16GT = 16,
XGMI_SPEED_25GT = 25,
XGMI_SPEED_32GT = 32
};
struct amdgpu_hive_info {
struct kobject kobj;
uint64_t hive_id;
@ -91,6 +97,8 @@ struct amdgpu_xgmi {
struct ras_common_if *ras_if;
bool connected_to_cpu;
struct amdgpu_xgmi_ras *ras;
enum amdgpu_xgmi_link_speed max_speed;
uint8_t max_width;
};
struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev);
@ -118,4 +126,7 @@ int amdgpu_xgmi_request_nps_change(struct amdgpu_device *adev,
int amdgpu_get_xgmi_link_status(struct amdgpu_device *adev,
int global_link_num);
void amdgpu_xgmi_early_init(struct amdgpu_device *adev);
uint32_t amdgpu_xgmi_get_max_bandwidth(struct amdgpu_device *adev);
#endif