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lib/crypto: x86/sha512: Migrate optimized SHA-512 code to library
Instead of exposing the x86-optimized SHA-512 code via x86-specific crypto_shash algorithms, instead just implement the sha512_blocks() library function. This is much simpler, it makes the SHA-512 (and SHA-384) library functions be x86-optimized, and it fixes the longstanding issue where the x86-optimized SHA-512 code was disabled by default. SHA-512 still remains available through crypto_shash, but individual architectures no longer need to handle it. To match sha512_blocks(), change the type of the nblocks parameter of the assembly functions from int to size_t. The assembly functions actually already treated it as size_t. Acked-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20250630160320.2888-15-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
This commit is contained in:
parent
02b35bab7e
commit
484c18119f
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@ -390,19 +390,6 @@ config CRYPTO_SHA1_SSSE3
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- AVX2 (Advanced Vector Extensions 2)
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- SHA-NI (SHA Extensions New Instructions)
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config CRYPTO_SHA512_SSSE3
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tristate "Hash functions: SHA-384 and SHA-512 (SSSE3/AVX/AVX2)"
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depends on 64BIT
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select CRYPTO_SHA512
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select CRYPTO_HASH
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help
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SHA-384 and SHA-512 secure hash algorithms (FIPS 180)
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Architecture: x86_64 using:
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- SSSE3 (Supplemental SSE3)
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- AVX (Advanced Vector Extensions)
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- AVX2 (Advanced Vector Extensions 2)
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config CRYPTO_SM3_AVX_X86_64
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tristate "Hash functions: SM3 (AVX)"
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depends on 64BIT
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@ -54,9 +54,6 @@ endif
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obj-$(CONFIG_CRYPTO_SHA1_SSSE3) += sha1-ssse3.o
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sha1-ssse3-y := sha1_avx2_x86_64_asm.o sha1_ssse3_asm.o sha1_ni_asm.o sha1_ssse3_glue.o
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obj-$(CONFIG_CRYPTO_SHA512_SSSE3) += sha512-ssse3.o
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sha512-ssse3-y := sha512-ssse3-asm.o sha512-avx-asm.o sha512-avx2-asm.o sha512_ssse3_glue.o
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obj-$(CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL) += ghash-clmulni-intel.o
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ghash-clmulni-intel-y := ghash-clmulni-intel_asm.o ghash-clmulni-intel_glue.o
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@ -1,322 +0,0 @@
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/*
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* Cryptographic API.
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*
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* Glue code for the SHA512 Secure Hash Algorithm assembler
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* implementation using supplemental SSE3 / AVX / AVX2 instructions.
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*
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* This file is based on sha512_generic.c
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*
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* Copyright (C) 2013 Intel Corporation
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* Author: Tim Chen <tim.c.chen@linux.intel.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <asm/cpu_device_id.h>
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#include <asm/simd.h>
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#include <crypto/internal/hash.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <crypto/sha2.h>
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#include <crypto/sha512_base.h>
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asmlinkage void sha512_transform_ssse3(struct sha512_state *state,
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const u8 *data, int blocks);
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static int sha512_update_x86(struct shash_desc *desc, const u8 *data,
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unsigned int len, sha512_block_fn *sha512_xform)
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{
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int remain;
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/*
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* Make sure struct sha512_state begins directly with the SHA512
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* 512-bit internal state, as this is what the asm functions expect.
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*/
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BUILD_BUG_ON(offsetof(struct sha512_state, state) != 0);
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kernel_fpu_begin();
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remain = sha512_base_do_update_blocks(desc, data, len, sha512_xform);
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kernel_fpu_end();
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return remain;
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}
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static int sha512_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out, sha512_block_fn *sha512_xform)
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{
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kernel_fpu_begin();
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sha512_base_do_finup(desc, data, len, sha512_xform);
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kernel_fpu_end();
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return sha512_base_finish(desc, out);
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}
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static int sha512_ssse3_update(struct shash_desc *desc, const u8 *data,
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unsigned int len)
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{
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return sha512_update_x86(desc, data, len, sha512_transform_ssse3);
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}
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static int sha512_ssse3_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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return sha512_finup(desc, data, len, out, sha512_transform_ssse3);
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}
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static struct shash_alg sha512_ssse3_algs[] = { {
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.digestsize = SHA512_DIGEST_SIZE,
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.init = sha512_base_init,
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.update = sha512_ssse3_update,
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.finup = sha512_ssse3_finup,
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.descsize = SHA512_STATE_SIZE,
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.base = {
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.cra_name = "sha512",
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.cra_driver_name = "sha512-ssse3",
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.cra_priority = 150,
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.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY |
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CRYPTO_AHASH_ALG_FINUP_MAX,
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.cra_blocksize = SHA512_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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}, {
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.digestsize = SHA384_DIGEST_SIZE,
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.init = sha384_base_init,
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.update = sha512_ssse3_update,
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.finup = sha512_ssse3_finup,
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.descsize = SHA512_STATE_SIZE,
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.base = {
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.cra_name = "sha384",
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.cra_driver_name = "sha384-ssse3",
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.cra_priority = 150,
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.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY |
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CRYPTO_AHASH_ALG_FINUP_MAX,
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.cra_blocksize = SHA384_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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} };
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static int register_sha512_ssse3(void)
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{
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if (boot_cpu_has(X86_FEATURE_SSSE3))
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return crypto_register_shashes(sha512_ssse3_algs,
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ARRAY_SIZE(sha512_ssse3_algs));
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return 0;
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}
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static void unregister_sha512_ssse3(void)
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{
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if (boot_cpu_has(X86_FEATURE_SSSE3))
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crypto_unregister_shashes(sha512_ssse3_algs,
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ARRAY_SIZE(sha512_ssse3_algs));
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}
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asmlinkage void sha512_transform_avx(struct sha512_state *state,
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const u8 *data, int blocks);
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static bool avx_usable(void)
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{
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if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL)) {
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if (boot_cpu_has(X86_FEATURE_AVX))
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pr_info("AVX detected but unusable.\n");
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return false;
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}
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return true;
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}
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static int sha512_avx_update(struct shash_desc *desc, const u8 *data,
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unsigned int len)
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{
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return sha512_update_x86(desc, data, len, sha512_transform_avx);
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}
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static int sha512_avx_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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return sha512_finup(desc, data, len, out, sha512_transform_avx);
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}
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static struct shash_alg sha512_avx_algs[] = { {
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.digestsize = SHA512_DIGEST_SIZE,
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.init = sha512_base_init,
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.update = sha512_avx_update,
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.finup = sha512_avx_finup,
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.descsize = SHA512_STATE_SIZE,
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.base = {
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.cra_name = "sha512",
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.cra_driver_name = "sha512-avx",
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.cra_priority = 160,
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.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY |
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CRYPTO_AHASH_ALG_FINUP_MAX,
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.cra_blocksize = SHA512_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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}, {
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.digestsize = SHA384_DIGEST_SIZE,
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.init = sha384_base_init,
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.update = sha512_avx_update,
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.finup = sha512_avx_finup,
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.descsize = SHA512_STATE_SIZE,
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.base = {
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.cra_name = "sha384",
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.cra_driver_name = "sha384-avx",
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.cra_priority = 160,
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.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY |
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CRYPTO_AHASH_ALG_FINUP_MAX,
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.cra_blocksize = SHA384_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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} };
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static int register_sha512_avx(void)
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{
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if (avx_usable())
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return crypto_register_shashes(sha512_avx_algs,
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ARRAY_SIZE(sha512_avx_algs));
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return 0;
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}
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static void unregister_sha512_avx(void)
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{
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if (avx_usable())
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crypto_unregister_shashes(sha512_avx_algs,
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ARRAY_SIZE(sha512_avx_algs));
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}
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asmlinkage void sha512_transform_rorx(struct sha512_state *state,
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const u8 *data, int blocks);
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static int sha512_avx2_update(struct shash_desc *desc, const u8 *data,
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unsigned int len)
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{
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return sha512_update_x86(desc, data, len, sha512_transform_rorx);
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}
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static int sha512_avx2_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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return sha512_finup(desc, data, len, out, sha512_transform_rorx);
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}
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static struct shash_alg sha512_avx2_algs[] = { {
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.digestsize = SHA512_DIGEST_SIZE,
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.init = sha512_base_init,
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.update = sha512_avx2_update,
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.finup = sha512_avx2_finup,
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.descsize = SHA512_STATE_SIZE,
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.base = {
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.cra_name = "sha512",
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.cra_driver_name = "sha512-avx2",
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.cra_priority = 170,
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.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY |
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CRYPTO_AHASH_ALG_FINUP_MAX,
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.cra_blocksize = SHA512_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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}, {
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.digestsize = SHA384_DIGEST_SIZE,
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.init = sha384_base_init,
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.update = sha512_avx2_update,
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.finup = sha512_avx2_finup,
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.descsize = SHA512_STATE_SIZE,
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.base = {
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.cra_name = "sha384",
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.cra_driver_name = "sha384-avx2",
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.cra_priority = 170,
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.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY |
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CRYPTO_AHASH_ALG_FINUP_MAX,
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.cra_blocksize = SHA384_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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} };
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static bool avx2_usable(void)
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{
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if (avx_usable() && boot_cpu_has(X86_FEATURE_AVX2) &&
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boot_cpu_has(X86_FEATURE_BMI2))
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return true;
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return false;
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}
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static int register_sha512_avx2(void)
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{
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if (avx2_usable())
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return crypto_register_shashes(sha512_avx2_algs,
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ARRAY_SIZE(sha512_avx2_algs));
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return 0;
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}
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static const struct x86_cpu_id module_cpu_ids[] = {
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X86_MATCH_FEATURE(X86_FEATURE_AVX2, NULL),
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X86_MATCH_FEATURE(X86_FEATURE_AVX, NULL),
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X86_MATCH_FEATURE(X86_FEATURE_SSSE3, NULL),
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, module_cpu_ids);
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static void unregister_sha512_avx2(void)
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{
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if (avx2_usable())
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crypto_unregister_shashes(sha512_avx2_algs,
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ARRAY_SIZE(sha512_avx2_algs));
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}
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static int __init sha512_ssse3_mod_init(void)
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{
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if (!x86_match_cpu(module_cpu_ids))
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return -ENODEV;
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if (register_sha512_ssse3())
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goto fail;
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if (register_sha512_avx()) {
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unregister_sha512_ssse3();
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goto fail;
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}
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if (register_sha512_avx2()) {
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unregister_sha512_avx();
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unregister_sha512_ssse3();
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goto fail;
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}
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return 0;
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fail:
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return -ENODEV;
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}
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static void __exit sha512_ssse3_mod_fini(void)
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{
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unregister_sha512_avx2();
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unregister_sha512_avx();
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unregister_sha512_ssse3();
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}
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module_init(sha512_ssse3_mod_init);
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module_exit(sha512_ssse3_mod_fini);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("SHA512 Secure Hash Algorithm, Supplemental SSE3 accelerated");
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MODULE_ALIAS_CRYPTO("sha512");
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MODULE_ALIAS_CRYPTO("sha512-ssse3");
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MODULE_ALIAS_CRYPTO("sha512-avx");
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MODULE_ALIAS_CRYPTO("sha512-avx2");
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MODULE_ALIAS_CRYPTO("sha384");
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MODULE_ALIAS_CRYPTO("sha384-ssse3");
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MODULE_ALIAS_CRYPTO("sha384-avx");
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MODULE_ALIAS_CRYPTO("sha384-avx2");
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@ -183,6 +183,7 @@ config CRYPTO_LIB_SHA512_ARCH
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default y if RISCV && 64BIT && RISCV_ISA_V && TOOLCHAIN_HAS_VECTOR_CRYPTO
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default y if S390
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default y if SPARC64
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default y if X86_64
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config CRYPTO_LIB_SM3
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tristate
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@ -95,6 +95,9 @@ endif
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libsha512-$(CONFIG_RISCV) += riscv/sha512-riscv64-zvknhb-zvkb.o
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libsha512-$(CONFIG_SPARC) += sparc/sha512_asm.o
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libsha512-$(CONFIG_X86) += x86/sha512-ssse3-asm.o \
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x86/sha512-avx-asm.o \
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x86/sha512-avx2-asm.o
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endif # CONFIG_CRYPTO_LIB_SHA512_ARCH
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obj-$(CONFIG_MPILIB) += mpi/
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@ -48,7 +48,6 @@
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########################################################################
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#include <linux/linkage.h>
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#include <linux/cfi_types.h>
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.text
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@ -267,14 +266,16 @@ frame_size = frame_WK + WK_SIZE
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.endm
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########################################################################
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# void sha512_transform_avx(sha512_state *state, const u8 *data, int blocks)
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# void sha512_transform_avx(struct sha512_block_state *state,
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# const u8 *data, size_t nblocks);
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# Purpose: Updates the SHA512 digest stored at "state" with the message
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# stored in "data".
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# The size of the message pointed to by "data" must be an integer multiple
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# of SHA512 message blocks.
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# "blocks" is the message length in SHA512 blocks
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# "nblocks" is the message length in SHA512 blocks
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########################################################################
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SYM_TYPED_FUNC_START(sha512_transform_avx)
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SYM_FUNC_START(sha512_transform_avx)
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test msglen, msglen
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je .Lnowork
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@ -50,7 +50,6 @@
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########################################################################
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#include <linux/linkage.h>
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#include <linux/cfi_types.h>
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.text
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@ -559,14 +558,16 @@ frame_size = frame_CTX + CTX_SIZE
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.endm
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########################################################################
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# void sha512_transform_rorx(sha512_state *state, const u8 *data, int blocks)
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# void sha512_transform_rorx(struct sha512_block_state *state,
|
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# const u8 *data, size_t nblocks);
|
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# Purpose: Updates the SHA512 digest stored at "state" with the message
|
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# stored in "data".
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# The size of the message pointed to by "data" must be an integer multiple
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# of SHA512 message blocks.
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# "blocks" is the message length in SHA512 blocks
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# "nblocks" is the message length in SHA512 blocks
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########################################################################
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SYM_TYPED_FUNC_START(sha512_transform_rorx)
|
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SYM_FUNC_START(sha512_transform_rorx)
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# Save GPRs
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push %rbx
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push %r12
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|
|
@ -48,7 +48,6 @@
|
|||
########################################################################
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/cfi_types.h>
|
||||
|
||||
.text
|
||||
|
||||
|
|
@ -266,16 +265,15 @@ frame_size = frame_WK + WK_SIZE
|
|||
.endm
|
||||
|
||||
########################################################################
|
||||
## void sha512_transform_ssse3(struct sha512_state *state, const u8 *data,
|
||||
## int blocks);
|
||||
# (struct sha512_state is assumed to begin with u64 state[8])
|
||||
# void sha512_transform_ssse3(struct sha512_block_state *state,
|
||||
# const u8 *data, size_t nblocks);
|
||||
# Purpose: Updates the SHA512 digest stored at "state" with the message
|
||||
# stored in "data".
|
||||
# The size of the message pointed to by "data" must be an integer multiple
|
||||
# of SHA512 message blocks.
|
||||
# "blocks" is the message length in SHA512 blocks.
|
||||
# "nblocks" is the message length in SHA512 blocks
|
||||
########################################################################
|
||||
SYM_TYPED_FUNC_START(sha512_transform_ssse3)
|
||||
SYM_FUNC_START(sha512_transform_ssse3)
|
||||
|
||||
test msglen, msglen
|
||||
je .Lnowork
|
||||
54
lib/crypto/x86/sha512.h
Normal file
54
lib/crypto/x86/sha512.h
Normal file
|
|
@ -0,0 +1,54 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
/*
|
||||
* x86-optimized SHA-512 block function
|
||||
*
|
||||
* Copyright 2025 Google LLC
|
||||
*/
|
||||
|
||||
#include <asm/fpu/api.h>
|
||||
#include <crypto/internal/simd.h>
|
||||
#include <linux/static_call.h>
|
||||
|
||||
DEFINE_STATIC_CALL(sha512_blocks_x86, sha512_blocks_generic);
|
||||
|
||||
#define DEFINE_X86_SHA512_FN(c_fn, asm_fn) \
|
||||
asmlinkage void asm_fn(struct sha512_block_state *state, \
|
||||
const u8 *data, size_t nblocks); \
|
||||
static void c_fn(struct sha512_block_state *state, const u8 *data, \
|
||||
size_t nblocks) \
|
||||
{ \
|
||||
if (likely(crypto_simd_usable())) { \
|
||||
kernel_fpu_begin(); \
|
||||
asm_fn(state, data, nblocks); \
|
||||
kernel_fpu_end(); \
|
||||
} else { \
|
||||
sha512_blocks_generic(state, data, nblocks); \
|
||||
} \
|
||||
}
|
||||
|
||||
DEFINE_X86_SHA512_FN(sha512_blocks_ssse3, sha512_transform_ssse3);
|
||||
DEFINE_X86_SHA512_FN(sha512_blocks_avx, sha512_transform_avx);
|
||||
DEFINE_X86_SHA512_FN(sha512_blocks_avx2, sha512_transform_rorx);
|
||||
|
||||
static void sha512_blocks(struct sha512_block_state *state,
|
||||
const u8 *data, size_t nblocks)
|
||||
{
|
||||
static_call(sha512_blocks_x86)(state, data, nblocks);
|
||||
}
|
||||
|
||||
#define sha512_mod_init_arch sha512_mod_init_arch
|
||||
static inline void sha512_mod_init_arch(void)
|
||||
{
|
||||
if (cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL) &&
|
||||
boot_cpu_has(X86_FEATURE_AVX)) {
|
||||
if (boot_cpu_has(X86_FEATURE_AVX2) &&
|
||||
boot_cpu_has(X86_FEATURE_BMI2))
|
||||
static_call_update(sha512_blocks_x86,
|
||||
sha512_blocks_avx2);
|
||||
else
|
||||
static_call_update(sha512_blocks_x86,
|
||||
sha512_blocks_avx);
|
||||
} else if (boot_cpu_has(X86_FEATURE_SSSE3)) {
|
||||
static_call_update(sha512_blocks_x86, sha512_blocks_ssse3);
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user