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mtd: rawnand: nandsim: Fix the logic when selecting Hamming soft ECC engine
commit3c97be6982upstream. I have been fooled by the logic picking the right ECC engine which is spread across two functions: *init_module() and *_attach(). I thought this driver was not impacted by the recent changes around the ECC engines DT parsing logic but in fact it is. Reported-by: kernel test robot <oliver.sang@intel.com> Fixes:d7157ff49a("mtd: rawnand: Use the ECC framework user input parsing bits") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210104093057.31178-1-miquel.raynal@bootlin.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -2211,6 +2211,9 @@ static int ns_attach_chip(struct nand_chip *chip)
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{
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unsigned int eccsteps, eccbytes;
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chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
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chip->ecc.algo = bch ? NAND_ECC_ALGO_BCH : NAND_ECC_ALGO_HAMMING;
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if (!bch)
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return 0;
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@ -2234,8 +2237,6 @@ static int ns_attach_chip(struct nand_chip *chip)
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return -EINVAL;
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}
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chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
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chip->ecc.algo = NAND_ECC_ALGO_BCH;
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chip->ecc.size = 512;
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chip->ecc.strength = bch;
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chip->ecc.bytes = eccbytes;
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@ -2274,8 +2275,6 @@ static int __init ns_init_module(void)
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nsmtd = nand_to_mtd(chip);
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nand_set_controller_data(chip, (void *)ns);
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chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
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chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
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/* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
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/* and 'badblocks' parameters to work */
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chip->options |= NAND_SKIP_BBTSCAN;
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