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drm/msm/adreno: Move adreno info to config

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Let's just stash it in adreno_platform_config rather than looking it up
in N different places.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/549777/
This commit is contained in:
Rob Clark 2023-07-27 14:20:16 -07:00
parent 8825f59692
commit 47bd37f948
4 changed files with 8 additions and 17 deletions
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15
drivers/gpu/drm/msm/adreno/a6xx_gpu.c
View File

@ -2316,7 +2316,6 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
struct msm_drm_private *priv = dev->dev_private;
struct platform_device *pdev = priv->gpu_pdev;
struct adreno_platform_config *config = pdev->dev.platform_data;
const struct adreno_info *info;
struct device_node *node;
struct a6xx_gpu *a6xx_gpu;
struct adreno_gpu *adreno_gpu;
@ -2341,20 +2340,12 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
adreno_gpu->gmu_is_wrapper = of_device_is_compatible(node, "qcom,adreno-gmu-wrapper");
/*
* We need to know the platform type before calling into adreno_gpu_init
* so that the hw_apriv flag can be correctly set. Snoop into the info
* and grab the revision number
*/
info = adreno_info(config->rev);
if (!info)
return ERR_PTR(-EINVAL);
adreno_gpu->base.hw_apriv = !!(info->quirks & ADRENO_QUIRK_HAS_HW_APRIV);
adreno_gpu->base.hw_apriv =
!!(config->info->quirks & ADRENO_QUIRK_HAS_HW_APRIV);
a6xx_llc_slices_init(pdev, a6xx_gpu);
ret = a6xx_set_supported_hw(&pdev->dev, info);
ret = a6xx_set_supported_hw(&pdev->dev, config->info);
if (ret) {
a6xx_destroy(&(a6xx_gpu->base.base));
return ERR_PTR(ret);

5
drivers/gpu/drm/msm/adreno/adreno_device.c
View File

@ -508,7 +508,7 @@ bool adreno_cmp_rev(struct adreno_rev rev1, struct adreno_rev rev2)
_rev_match(rev1.patchid, rev2.patchid);
}
const struct adreno_info *adreno_info(struct adreno_rev rev)
static const struct adreno_info *adreno_info(struct adreno_rev rev)
{
int i;
@ -659,13 +659,14 @@ static int adreno_bind(struct device *dev, struct device *master, void *data)
priv->gpu_pdev = to_platform_device(dev);
info = adreno_info(config.rev);
if (!info) {
dev_warn(drm->dev, "Unknown GPU revision: %"ADRENO_CHIPID_FMT"\n",
ADRENO_CHIPID_ARGS(config.rev));
return -ENXIO;
}
config.info = info;
DBG("Found GPU: %"ADRENO_CHIPID_FMT, ADRENO_CHIPID_ARGS(config.rev));
priv->is_a2xx = info->family < ADRENO_3XX;

2
drivers/gpu/drm/msm/adreno/adreno_gpu.c
View File

@ -1079,7 +1079,7 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
int ret;
adreno_gpu->funcs = funcs;
adreno_gpu->info = adreno_info(config->rev);
adreno_gpu->info = config->info;
adreno_gpu->rev = *rev;
/* Only handle the core clock when GMU is not in use (or is absent). */

3
drivers/gpu/drm/msm/adreno/adreno_gpu.h
View File

@ -130,8 +130,6 @@ struct adreno_info {
*/
#define ADRENO_SPEEDBINS(tbl...) (struct adreno_speedbin[]) { tbl {SHRT_MAX, 0} }
const struct adreno_info *adreno_info(struct adreno_rev rev);
struct adreno_gpu {
struct msm_gpu base;
struct adreno_rev rev;
@ -185,6 +183,7 @@ struct adreno_ocmem {
/* platform config data (ie. from DT, or pdata) */
struct adreno_platform_config {
struct adreno_rev rev;
const struct adreno_info *info;
};
#define ADRENO_IDLE_TIMEOUT msecs_to_jiffies(1000)