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drm/panel: Add Novatek NT36532 panel driver
Add a driver for panels using the Novatek NT36532 Display Driver IC, including support for the CSOT PPC100HB1-1, found in the OnePlus Pad 2 tablets. It has been tested on the OnePlus Pad 2: the panel comes up in its native 3000x2120 mode at 120Hz over dual-DSI in bonded mode with DSC, and displays a stable image. Signed-off-by: Junjie Cao <junjie.cao@linux.dev> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260804074233.85629-1-junjie.cao@linux.dev
This commit is contained in:
Junjie Cao
Neil Armstrong
parent
1c523f0a93
commit
47b823940e
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@ -8340,6 +8340,13 @@ T: git https://gitlab.freedesktop.org/drm/misc/kernel.git
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F: Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml
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F: drivers/gpu/drm/panel/panel-novatek-nt36523.c
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DRM DRIVER FOR NOVATEK NT36532 PANELS
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M: Junjie Cao <junjie.cao@linux.dev>
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S: Maintained
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T: git https://gitlab.freedesktop.org/drm/misc/kernel.git
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F: Documentation/devicetree/bindings/display/panel/novatek,nt36532.yaml
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F: drivers/gpu/drm/panel/panel-novatek-nt36532.c
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DRM DRIVER FOR NOVATEK NT36672A PANELS
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M: Sumit Semwal <sumit.semwal@linaro.org>
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S: Maintained
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@ -675,6 +675,20 @@ config DRM_PANEL_NOVATEK_NT36523
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around the Novatek NT36523 display controller, such as some
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Boe panels used in Xiaomi Mi Pad 5 and 5 Pro tablets.
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config DRM_PANEL_NOVATEK_NT36532
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tristate "Novatek NT36532-based MIPI-DSI panels"
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depends on OF
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depends on DRM_MIPI_DSI
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depends on BACKLIGHT_CLASS_DEVICE
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select DRM_DISPLAY_DSC_HELPER
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select DRM_DISPLAY_HELPER
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select DRM_KMS_HELPER
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help
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Say Y here if you want to enable support for the panels built
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around the Novatek NT36532 display controller, such as some
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CSOT panels used in OnePlus Pad 2 tablets. These panels are
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typically dual-DSI and may use DSC (Display Stream Compression).
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config DRM_PANEL_NOVATEK_NT36536
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tristate "Novatek NT36536 panel driver"
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depends on OF
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@ -65,6 +65,7 @@ obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35532) += panel-novatek-nt35532.o
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obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o
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obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o
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obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36523) += panel-novatek-nt36523.o
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obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36532) += panel-novatek-nt36532.o
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obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36536) += panel-novatek-nt36536.o
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obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672A) += panel-novatek-nt36672a.o
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obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672E) += panel-novatek-nt36672e.o
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431
drivers/gpu/drm/panel/panel-novatek-nt36532.c
Normal file
431
drivers/gpu/drm/panel/panel-novatek-nt36532.c
Normal file
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@ -0,0 +1,431 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Novatek NT36532 DriverIC panels driver
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* Based on the template generated by linux-mdss-dsi-panel-driver-generator
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*
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* Copyright (c) 2025, 2026 Junjie Cao <junjie.cao@linux.dev>
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*/
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#include <linux/delay.h>
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#include <linux/device-id/of.h>
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#include <linux/gpio/consumer.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_graph.h>
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#include <linux/regulator/consumer.h>
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#include <video/mipi_display.h>
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#include <drm/display/drm_dsc.h>
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#include <drm/display/drm_dsc_helper.h>
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#include <drm/drm_mipi_dsi.h>
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#include <drm/drm_modes.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_probe_helper.h>
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struct nt36532 {
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struct drm_panel panel;
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struct mipi_dsi_device *dsi[2];
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const struct panel_info *panel_info;
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struct drm_dsc_config dsc;
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struct gpio_desc *reset_gpio;
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struct regulator_bulk_data *supplies;
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};
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struct panel_info {
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unsigned int lanes;
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enum mipi_dsi_pixel_format format;
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unsigned long mode_flags;
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const struct drm_display_mode display_mode;
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const struct drm_dsc_config *dsc_cfg;
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int (*init_sequence)(struct nt36532 *ctx);
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bool is_dual_dsi;
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};
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static const struct regulator_bulk_data nt36532_supplies[] = {
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{ .supply = "vddio" }, /* 1.8v */
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};
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static inline struct nt36532 *to_nt36532(struct drm_panel *panel)
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{
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return container_of(panel, struct nt36532, panel);
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}
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static inline struct mipi_dsi_device *to_primary_dsi(struct nt36532 *ctx)
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{
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/* Sync on DSI1 for dual dsi */
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return ctx->panel_info->is_dual_dsi ? ctx->dsi[1] : ctx->dsi[0];
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}
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static void nt36532_reset(struct nt36532 *ctx)
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{
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gpiod_set_value_cansleep(ctx->reset_gpio, 0);
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usleep_range(10000, 10100);
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gpiod_set_value_cansleep(ctx->reset_gpio, 1);
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usleep_range(5000, 5100);
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gpiod_set_value_cansleep(ctx->reset_gpio, 0);
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usleep_range(15000, 15100);
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}
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static int nt36532_prepare(struct drm_panel *panel)
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{
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struct nt36532 *ctx = to_nt36532(panel);
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int ret;
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ret = regulator_bulk_enable(ARRAY_SIZE(nt36532_supplies),
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ctx->supplies);
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if (ret < 0)
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return ret;
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nt36532_reset(ctx);
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ret = ctx->panel_info->init_sequence(ctx);
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if (ret < 0) {
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gpiod_set_value_cansleep(ctx->reset_gpio, 1);
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regulator_bulk_disable(ARRAY_SIZE(nt36532_supplies),
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ctx->supplies);
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return ret;
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}
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return 0;
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}
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static int nt36532_off(struct nt36532 *ctx)
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{
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struct mipi_dsi_device *dsi = to_primary_dsi(ctx);
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struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
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mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
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mipi_dsi_usleep_range(&dsi_ctx, 10000, 10100);
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mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
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mipi_dsi_msleep(&dsi_ctx, 65);
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return dsi_ctx.accum_err;
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}
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static int nt36532_unprepare(struct drm_panel *panel)
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{
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struct nt36532 *ctx = to_nt36532(panel);
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struct device *dev = &ctx->dsi[0]->dev;
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int ret;
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ret = nt36532_off(ctx);
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if (ret < 0)
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dev_err(dev, "Failed to un-initialize panel: %d\n", ret);
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gpiod_set_value_cansleep(ctx->reset_gpio, 1);
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regulator_bulk_disable(ARRAY_SIZE(nt36532_supplies), ctx->supplies);
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return 0;
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}
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static int nt36532_get_modes(struct drm_panel *panel,
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struct drm_connector *connector)
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{
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struct nt36532 *ctx = to_nt36532(panel);
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const struct panel_info *panel_info = ctx->panel_info;
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return drm_connector_helper_get_modes_fixed(connector,
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&panel_info->display_mode);
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}
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static const struct drm_panel_funcs nt36532_panel_funcs = {
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.prepare = nt36532_prepare,
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.unprepare = nt36532_unprepare,
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.get_modes = nt36532_get_modes,
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};
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static int csot_init_sequence(struct nt36532 *ctx)
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{
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struct mipi_dsi_device *dsi = to_primary_dsi(ctx);
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struct drm_dsc_picture_parameter_set pps;
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struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x22);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2d, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x24);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbc,
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0x00, 0x00, 0x03, 0x22, 0x00, 0x41);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x23);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x60);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x20);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x5a);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x0c);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x03);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0xe1);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0xa9);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x16);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0x8e);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0b, 0x8e);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x8e);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x04);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x08);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x0c);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x10);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x14);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x18);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x1c);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x20);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x24);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x28);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x2c);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x30);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x34);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x38);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x3c);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x20);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x20);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0xff);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0xfd);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0xfc);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0xfa);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0xf8);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0xf6);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0xf4);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0xf2);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0xf0);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0xee);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0xec);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0xea);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0xe9);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0xe8);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0xe7);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0xe6);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0xff);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x46, 0xf9);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0xf6);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0xf2);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0xf0);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4a, 0xec);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4b, 0xe8);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4c, 0xe4);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4d, 0xe0);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4e, 0xde);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4f, 0xd9);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0xd6);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0xd4);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0xc2);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0xd0);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x54, 0xcd);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0xff);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0xf6);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0xf0);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0xeb);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0xe8);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0xe5);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0xe3);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0xe0);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0xde);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0xda);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0xd7);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0xd4);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0xd2);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0xd0);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0xcc);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0xc8);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x27);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0xf0);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0x2a, 0x00);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd0, 0x31);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd1, 0x54);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xde, 0x40);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdf, 0x02);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x2a);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc4, 0x02);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0xf0);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfa, 0x05);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x16);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x23);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xba, 0xaa, 0x2a);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbb, 0xa0, 0x2a);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x27);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x8c);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x10);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_DISPLAY_BRIGHTNESS,
|
||||
0x07, 0xff);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY,
|
||||
0x2c);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x00);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x01);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x02);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b,
|
||||
0x03, 0xd2, 0x1a, 0x04, 0x04, 0x00);
|
||||
|
||||
/* Enable DSC */
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x90, 0x03);
|
||||
drm_dsc_pps_payload_pack(&pps, &ctx->dsc);
|
||||
mipi_dsi_picture_parameter_set_multi(&dsi_ctx, &pps);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x9d, 0x01);
|
||||
|
||||
/* Program refresh rate control registers */
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x91);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x40);
|
||||
|
||||
mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
|
||||
mipi_dsi_msleep(&dsi_ctx, 120);
|
||||
|
||||
mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
|
||||
mipi_dsi_usleep_range(&dsi_ctx, 10000, 10100);
|
||||
|
||||
return dsi_ctx.accum_err;
|
||||
}
|
||||
|
||||
static const struct drm_display_mode csot_display_mode = {
|
||||
/* 120Hz, the typical value */
|
||||
.clock = (1500 + 118 + 20 + 100) * 2 * (2120 + 26 + 2 + 208) * 120 / 1000,
|
||||
.hdisplay = 1500 * 2,
|
||||
.hsync_start = (1500 + 118) * 2,
|
||||
.hsync_end = (1500 + 118 + 20) * 2,
|
||||
.htotal = (1500 + 118 + 20 + 100) * 2,
|
||||
.vdisplay = 2120,
|
||||
.vsync_start = 2120 + 26,
|
||||
.vsync_end = 2120 + 26 + 2,
|
||||
.vtotal = 2120 + 26 + 2 + 208,
|
||||
.width_mm = 250,
|
||||
.height_mm = 177,
|
||||
};
|
||||
|
||||
static const struct drm_dsc_config csot_dsc_cfg = {
|
||||
.dsc_version_major = 1,
|
||||
.dsc_version_minor = 2,
|
||||
.slice_height = 20,
|
||||
.slice_width = 750,
|
||||
.slice_count = 2,
|
||||
.bits_per_component = 8,
|
||||
.bits_per_pixel = 8 << 4,
|
||||
.block_pred_enable = true,
|
||||
};
|
||||
|
||||
static int nt36532_probe(struct mipi_dsi_device *dsi)
|
||||
{
|
||||
struct mipi_dsi_device_info dsi_info = {"nt36532-secondary", 0, NULL};
|
||||
const struct panel_info *panel_info;
|
||||
struct mipi_dsi_host *dsi1_host;
|
||||
struct device *dev = &dsi->dev;
|
||||
struct device_node *dsi1;
|
||||
struct nt36532 *ctx;
|
||||
int num_dsi = 1;
|
||||
int ret, i;
|
||||
|
||||
ctx = devm_drm_panel_alloc(dev, struct nt36532, panel,
|
||||
&nt36532_panel_funcs,
|
||||
DRM_MODE_CONNECTOR_DSI);
|
||||
if (IS_ERR(ctx))
|
||||
return PTR_ERR(ctx);
|
||||
|
||||
ret = devm_regulator_bulk_get_const(&dsi->dev,
|
||||
ARRAY_SIZE(nt36532_supplies),
|
||||
nt36532_supplies, &ctx->supplies);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
|
||||
if (IS_ERR(ctx->reset_gpio))
|
||||
return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
|
||||
"Failed to get reset-gpios\n");
|
||||
|
||||
ctx->panel_info = of_device_get_match_data(dev);
|
||||
panel_info = ctx->panel_info;
|
||||
if (!panel_info)
|
||||
return -ENODEV;
|
||||
|
||||
ctx->dsc = *panel_info->dsc_cfg;
|
||||
|
||||
if (panel_info->is_dual_dsi) {
|
||||
num_dsi = 2;
|
||||
dsi1 = of_graph_get_remote_node(dsi->dev.of_node, 1, -1);
|
||||
if (!dsi1) {
|
||||
dev_err(dev, "cannot get secondary DSI node.\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
dsi1_host = of_find_mipi_dsi_host_by_node(dsi1);
|
||||
of_node_put(dsi1);
|
||||
if (!dsi1_host)
|
||||
return dev_err_probe(dev, -EPROBE_DEFER,
|
||||
"cannot get secondary DSI host\n");
|
||||
|
||||
ctx->dsi[1] = devm_mipi_dsi_device_register_full(dev, dsi1_host,
|
||||
&dsi_info);
|
||||
if (IS_ERR(ctx->dsi[1])) {
|
||||
dev_err(dev, "cannot get secondary DSI device\n");
|
||||
return PTR_ERR(ctx->dsi[1]);
|
||||
}
|
||||
|
||||
mipi_dsi_set_drvdata(ctx->dsi[1], ctx);
|
||||
}
|
||||
|
||||
ctx->dsi[0] = dsi;
|
||||
mipi_dsi_set_drvdata(dsi, ctx);
|
||||
|
||||
ctx->panel.prepare_prev_first = true;
|
||||
|
||||
ret = drm_panel_of_backlight(&ctx->panel);
|
||||
if (ret)
|
||||
return dev_err_probe(dev, ret, "Failed to get backlight\n");
|
||||
|
||||
ret = devm_drm_panel_add(dev, &ctx->panel);
|
||||
if (ret < 0)
|
||||
return dev_err_probe(dev, ret, "failed to add panel\n");
|
||||
|
||||
for (i = 0; i < num_dsi; i++) {
|
||||
ctx->dsi[i]->lanes = panel_info->lanes;
|
||||
ctx->dsi[i]->format = panel_info->format;
|
||||
ctx->dsi[i]->mode_flags = panel_info->mode_flags;
|
||||
ctx->dsi[i]->dsc = &ctx->dsc;
|
||||
ret = devm_mipi_dsi_attach(dev, ctx->dsi[i]);
|
||||
if (ret < 0) {
|
||||
return dev_err_probe(dev, ret,
|
||||
"Failed to attach to DSI host\n");
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct panel_info csot_panel_info = {
|
||||
.lanes = 4,
|
||||
.format = MIPI_DSI_FMT_RGB888,
|
||||
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS |
|
||||
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_DSC_ALL_SLICES_IN_PKT,
|
||||
.display_mode = csot_display_mode,
|
||||
.dsc_cfg = &csot_dsc_cfg,
|
||||
.init_sequence = csot_init_sequence,
|
||||
.is_dual_dsi = true,
|
||||
};
|
||||
|
||||
static const struct of_device_id nt36532_of_match[] = {
|
||||
{ .compatible = "csot,ppc100hb1-1", .data = &csot_panel_info },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, nt36532_of_match);
|
||||
|
||||
static struct mipi_dsi_driver nt36532_driver = {
|
||||
.probe = nt36532_probe,
|
||||
.driver = {
|
||||
.name = "panel-novatek-nt36532",
|
||||
.of_match_table = nt36532_of_match,
|
||||
},
|
||||
};
|
||||
module_mipi_dsi_driver(nt36532_driver);
|
||||
|
||||
MODULE_AUTHOR("Junjie Cao <junjie.cao@linux.dev>");
|
||||
MODULE_DESCRIPTION("DRM driver for Novatek NT36532 based MIPI DSI panels");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Reference in New Issue
Block a user