arm64: dts: qcom: hamoa/purwa: Flatten usb controller nodes

Flatten usb controller nodes and update to using latest bindings and
flattened driver approach.

Tested this patch on CRD platform. For testing purpose, modified dr_mode
property and added usb-role-switch property to the 3 super speed capable
DRD controllers and valdiated both host and device mode. Also validated
host mode on the multiport controller.

Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260323103119.1801139-1-krishna.kurapati@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Krishna Kurapati 2026-03-23 16:01:19 +05:30 committed by Bjorn Andersson
parent 80de83eafd
commit 4793de55d3
17 changed files with 227 additions and 362 deletions

View File

@ -576,12 +576,10 @@ wake-n-pins {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "otg";
usb-role-switch;
status = "okay";
};
&usb_1_ss0_hsphy {
@ -599,12 +597,10 @@ &usb_1_ss0_qmpphy {
};
&usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "otg";
usb-role-switch;
status = "okay";
};
&usb_1_ss1_hsphy {
@ -622,12 +618,10 @@ &usb_1_ss1_qmpphy {
};
&usb_1_ss2 {
status = "okay";
};
&usb_1_ss2_dwc3 {
dr_mode = "otg";
usb-role-switch;
status = "okay";
};
&usb_1_ss2_hsphy {
@ -645,11 +639,9 @@ &usb_1_ss2_qmpphy {
};
&usb_2 {
status = "okay";
};
&usb_2_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_2_hsphy {

View File

@ -5036,9 +5036,9 @@ usb_mp_qmpphy1: phy@88e5000 {
status = "disabled";
};
usb_1_ss2: usb@a0f8800 {
compatible = "qcom,x1e80100-dwc3", "qcom,dwc3";
reg = <0 0x0a0f8800 0 0x400>;
usb_1_ss2: usb@a000000 {
compatible = "qcom,x1e80100-dwc3", "qcom,snps-dwc3";
reg = <0 0x0a000000 0 0xfc100>;
clocks = <&gcc GCC_CFG_NOC_USB3_TERT_AXI_CLK>,
<&gcc GCC_USB30_TERT_MASTER_CLK>,
@ -5064,11 +5064,13 @@ usb_1_ss2: usb@a0f8800 {
assigned-clock-rates = <19200000>,
<200000000>;
interrupts-extended = <&intc GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
interrupts-extended = <&intc GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 58 IRQ_TYPE_EDGE_BOTH>,
<&pdc 57 IRQ_TYPE_EDGE_BOTH>,
<&pdc 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pwr_event",
interrupt-names = "dwc_usb3",
"pwr_event",
"dp_hs_phy_irq",
"dm_hs_phy_irq",
"ss_phy_irq";
@ -5087,61 +5089,47 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
wakeup-source;
#address-cells = <2>;
#size-cells = <2>;
ranges;
iommus = <&apps_smmu 0x14a0 0x0>;
phys = <&usb_1_ss2_hsphy>,
<&usb_1_ss2_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy",
"usb3-phy";
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,usb3_lpm_capable;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
dma-coherent;
status = "disabled";
usb_1_ss2_dwc3: usb@a000000 {
compatible = "snps,dwc3";
reg = <0 0x0a000000 0 0xcd00>;
ports {
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
port@0 {
reg = <0>;
iommus = <&apps_smmu 0x14a0 0x0>;
phys = <&usb_1_ss2_hsphy>,
<&usb_1_ss2_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy",
"usb3-phy";
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,usb3_lpm_capable;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
dma-coherent;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_1_ss2_dwc3_hs: endpoint {
};
usb_1_ss2_dwc3_hs: endpoint {
};
};
port@1 {
reg = <1>;
port@1 {
reg = <1>;
usb_1_ss2_dwc3_ss: endpoint {
remote-endpoint = <&usb_1_ss2_qmpphy_usb_ss_in>;
};
usb_1_ss2_dwc3_ss: endpoint {
remote-endpoint = <&usb_1_ss2_qmpphy_usb_ss_in>;
};
};
};
};
usb_2: usb@a2f8800 {
compatible = "qcom,x1e80100-dwc3", "qcom,dwc3";
reg = <0 0x0a2f8800 0 0x400>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
usb_2: usb@a200000 {
compatible = "qcom,x1e80100-dwc3", "qcom,snps-dwc3";
reg = <0 0x0a200000 0 0xfc100>;
clocks = <&gcc GCC_CFG_NOC_USB2_PRIM_AXI_CLK>,
<&gcc GCC_USB20_MASTER_CLK>,
@ -5166,10 +5154,12 @@ usb_2: usb@a2f8800 {
<&gcc GCC_USB20_MASTER_CLK>;
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
interrupts-extended = <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 50 IRQ_TYPE_EDGE_BOTH>,
<&pdc 49 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "pwr_event",
interrupt-names = "dwc_usb3",
"pwr_event",
"dp_hs_phy_irq",
"dm_hs_phy_irq";
@ -5188,31 +5178,26 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
qcom,select-utmi-as-pipe-clk;
wakeup-source;
iommus = <&apps_smmu 0x14e0 0x0>;
phys = <&usb_2_hsphy>;
phy-names = "usb2-phy";
maximum-speed = "high-speed";
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
dma-coherent;
status = "disabled";
usb_2_dwc3: usb@a200000 {
compatible = "snps,dwc3";
reg = <0 0x0a200000 0 0xcd00>;
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
iommus = <&apps_smmu 0x14e0 0x0>;
phys = <&usb_2_hsphy>;
phy-names = "usb2-phy";
maximum-speed = "high-speed";
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
dma-coherent;
port {
usb_2_dwc3_hs: endpoint {
};
port {
usb_2_dwc3_hs: endpoint {
};
};
};
usb_mp: usb@a4f8800 {
compatible = "qcom,x1e80100-dwc3-mp", "qcom,dwc3";
reg = <0 0x0a4f8800 0 0x400>;
usb_mp: usb@a400000 {
compatible = "qcom,x1e80100-dwc3-mp", "qcom,snps-dwc3";
reg = <0 0x0a400000 0 0xfc100>;
clocks = <&gcc GCC_CFG_NOC_USB3_MP_AXI_CLK>,
<&gcc GCC_USB30_MP_MASTER_CLK>,
@ -5238,7 +5223,8 @@ usb_mp: usb@a4f8800 {
assigned-clock-rates = <19200000>,
<200000000>;
interrupts-extended = <&intc GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
interrupts-extended = <&intc GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
@ -5248,7 +5234,8 @@ usb_mp: usb@a4f8800 {
<&pdc 53 IRQ_TYPE_EDGE_BOTH>,
<&pdc 55 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 56 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pwr_event_1", "pwr_event_2",
interrupt-names = "dwc_usb3",
"pwr_event_1", "pwr_event_2",
"hs_phy_1", "hs_phy_2",
"dp_hs_phy_1", "dm_hs_phy_1",
"dp_hs_phy_2", "dm_hs_phy_2",
@ -5268,39 +5255,28 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
wakeup-source;
#address-cells = <2>;
#size-cells = <2>;
ranges;
iommus = <&apps_smmu 0x1400 0x0>;
phys = <&usb_mp_hsphy0>, <&usb_mp_qmpphy0>,
<&usb_mp_hsphy1>, <&usb_mp_qmpphy1>;
phy-names = "usb2-0", "usb3-0",
"usb2-1", "usb3-1";
dr_mode = "host";
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,usb3_lpm_capable;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
dma-coherent;
status = "disabled";
usb_mp_dwc3: usb@a400000 {
compatible = "snps,dwc3";
reg = <0 0x0a400000 0 0xcd00>;
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
iommus = <&apps_smmu 0x1400 0x0>;
phys = <&usb_mp_hsphy0>, <&usb_mp_qmpphy0>,
<&usb_mp_hsphy1>, <&usb_mp_qmpphy1>;
phy-names = "usb2-0", "usb3-0",
"usb2-1", "usb3-1";
dr_mode = "host";
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,usb3_lpm_capable;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
dma-coherent;
};
};
usb_1_ss0: usb@a6f8800 {
compatible = "qcom,x1e80100-dwc3", "qcom,dwc3";
reg = <0 0x0a6f8800 0 0x400>;
usb_1_ss0: usb@a600000 {
compatible = "qcom,x1e80100-dwc3", "qcom,snps-dwc3";
reg = <0 0x0a600000 0 0xfc100>;
clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>,
@ -5326,11 +5302,13 @@ usb_1_ss0: usb@a6f8800 {
assigned-clock-rates = <19200000>,
<200000000>;
interrupts-extended = <&intc GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>,
interrupts-extended = <&intc GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 61 IRQ_TYPE_EDGE_BOTH>,
<&pdc 15 IRQ_TYPE_EDGE_BOTH>,
<&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pwr_event",
interrupt-names = "dwc_usb3",
"pwr_event",
"dp_hs_phy_irq",
"dm_hs_phy_irq",
"ss_phy_irq";
@ -5342,58 +5320,47 @@ usb_1_ss0: usb@a6f8800 {
wakeup-source;
#address-cells = <2>;
#size-cells = <2>;
ranges;
iommus = <&apps_smmu 0x1420 0x0>;
phys = <&usb_1_ss0_hsphy>,
<&usb_1_ss0_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy",
"usb3-phy";
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,usb3_lpm_capable;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
dma-coherent;
status = "disabled";
usb_1_ss0_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0 0x0a600000 0 0xcd00>;
ports {
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
port@0 {
reg = <0>;
iommus = <&apps_smmu 0x1420 0x0>;
phys = <&usb_1_ss0_hsphy>,
<&usb_1_ss0_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy",
"usb3-phy";
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,usb3_lpm_capable;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
dma-coherent;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_1_ss0_dwc3_hs: endpoint {
};
usb_1_ss0_dwc3_hs: endpoint {
};
};
port@1 {
reg = <1>;
port@1 {
reg = <1>;
usb_1_ss0_dwc3_ss: endpoint {
remote-endpoint = <&usb_1_ss0_qmpphy_usb_ss_in>;
};
usb_1_ss0_dwc3_ss: endpoint {
remote-endpoint = <&usb_1_ss0_qmpphy_usb_ss_in>;
};
};
};
};
usb_1_ss1: usb@a8f8800 {
compatible = "qcom,x1e80100-dwc3", "qcom,dwc3";
reg = <0 0x0a8f8800 0 0x400>;
usb_1_ss1: usb@a800000 {
compatible = "qcom,x1e80100-dwc3", "qcom,snps-dwc3";
reg = <0 0x0a800000 0 0xfc100>;
clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
<&gcc GCC_USB30_SEC_MASTER_CLK>,
@ -5419,11 +5386,13 @@ usb_1_ss1: usb@a8f8800 {
assigned-clock-rates = <19200000>,
<200000000>;
interrupts-extended = <&intc GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>,
interrupts-extended = <&intc GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 60 IRQ_TYPE_EDGE_BOTH>,
<&pdc 11 IRQ_TYPE_EDGE_BOTH>,
<&pdc 47 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pwr_event",
interrupt-names = "dwc_usb3",
"pwr_event",
"dp_hs_phy_irq",
"dm_hs_phy_irq",
"ss_phy_irq";
@ -5442,50 +5411,39 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
wakeup-source;
#address-cells = <2>;
#size-cells = <2>;
ranges;
iommus = <&apps_smmu 0x1460 0x0>;
phys = <&usb_1_ss1_hsphy>,
<&usb_1_ss1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy",
"usb3-phy";
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,usb3_lpm_capable;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
dma-coherent;
status = "disabled";
usb_1_ss1_dwc3: usb@a800000 {
compatible = "snps,dwc3";
reg = <0 0x0a800000 0 0xcd00>;
ports {
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
port@0 {
reg = <0>;
iommus = <&apps_smmu 0x1460 0x0>;
phys = <&usb_1_ss1_hsphy>,
<&usb_1_ss1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy",
"usb3-phy";
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,usb3_lpm_capable;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
dma-coherent;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_1_ss1_dwc3_hs: endpoint {
};
usb_1_ss1_dwc3_hs: endpoint {
};
};
port@1 {
reg = <1>;
port@1 {
reg = <1>;
usb_1_ss1_dwc3_ss: endpoint {
remote-endpoint = <&usb_1_ss1_qmpphy_usb_ss_in>;
};
usb_1_ss1_dwc3_ss: endpoint {
remote-endpoint = <&usb_1_ss1_qmpphy_usb_ss_in>;
};
};
};

View File

@ -569,12 +569,10 @@ wake-n-pins {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "otg";
usb-role-switch;
status = "okay";
};
&usb_1_ss0_hsphy {
@ -592,12 +590,10 @@ &usb_1_ss0_qmpphy {
};
&usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "otg";
usb-role-switch;
status = "okay";
};
&usb_1_ss1_hsphy {
@ -615,12 +611,10 @@ &usb_1_ss1_qmpphy {
};
&usb_1_ss2 {
status = "okay";
};
&usb_1_ss2_dwc3 {
dr_mode = "otg";
usb-role-switch;
status = "okay";
};
&usb_1_ss2_hsphy {
@ -638,11 +632,9 @@ &usb_1_ss2_qmpphy {
};
&usb_2 {
status = "okay";
};
&usb_2_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_2_hsphy {

View File

@ -1233,11 +1233,9 @@ &usb_1_ss0_qmpphy {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss0_dwc3_hs {
@ -1265,11 +1263,9 @@ &usb_1_ss1_qmpphy {
};
&usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss1_dwc3_hs {
@ -1309,11 +1305,9 @@ usb_1_ss2_qmpphy_out_dp: endpoint@0 {
};
&usb_2 {
status = "okay";
};
&usb_2_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_2_hsphy {

View File

@ -1457,11 +1457,9 @@ &usb_1_ss0_qmpphy {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss0_dwc3_hs {
@ -1489,11 +1487,9 @@ &usb_1_ss1_qmpphy {
};
&usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss1_dwc3_hs {

View File

@ -1735,11 +1735,9 @@ &usb_1_ss0_qmpphy {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss0_dwc3_hs {
@ -1767,11 +1765,9 @@ &usb_1_ss1_qmpphy {
};
&usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss1_dwc3_hs {
@ -1799,11 +1795,9 @@ &usb_1_ss2_qmpphy {
};
&usb_1_ss2 {
status = "okay";
};
&usb_1_ss2_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss2_dwc3_hs {

View File

@ -1552,11 +1552,9 @@ bluetooth {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss0_dwc3_hs {
@ -1584,11 +1582,9 @@ &usb_1_ss0_qmpphy_out {
};
&usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss1_dwc3_hs {
@ -1616,11 +1612,9 @@ &usb_1_ss1_qmpphy_out {
};
&usb_2 {
status = "okay";
};
&usb_2_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_2_hsphy {

View File

@ -1471,11 +1471,9 @@ &usb_1_ss0_qmpphy {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss0_dwc3_hs {
@ -1503,11 +1501,9 @@ &usb_1_ss1_qmpphy {
};
&usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss1_dwc3_hs {
@ -1519,12 +1515,10 @@ &usb_1_ss1_qmpphy_out {
};
&usb_mp {
status = "okay";
};
&usb_mp_dwc3 {
phys = <&usb_mp_hsphy0>, <&usb_mp_qmpphy0>;
phy-names = "usb2-0", "usb3-0";
status = "okay";
};
&usb_mp_hsphy0 {

View File

@ -1274,11 +1274,9 @@ &usb_1_ss0_qmpphy {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss0_dwc3_hs {
@ -1306,11 +1304,9 @@ &usb_1_ss1_qmpphy {
};
&usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss1_dwc3_hs {

View File

@ -1389,12 +1389,10 @@ &usb_1_ss0_qmpphy {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "otg";
usb-role-switch;
status = "okay";
};
&usb_1_ss0_dwc3_hs {
@ -1422,11 +1420,9 @@ &usb_1_ss1_qmpphy {
};
&usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss1_dwc3_hs {
@ -1454,11 +1450,9 @@ &usb_1_ss2_qmpphy {
};
&usb_1_ss2 {
status = "okay";
};
&usb_1_ss2_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss2_dwc3_hs {

View File

@ -1608,11 +1608,9 @@ &usb_1_ss0_qmpphy {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss0_dwc3_hs {
@ -1640,11 +1638,9 @@ &usb_1_ss1_qmpphy {
};
&usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss1_dwc3_hs {
@ -1684,11 +1680,9 @@ usb_1_ss2_qmpphy_out_dp: endpoint@0 {
};
&usb_2 {
status = "okay";
};
&usb_2_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_2_hsphy {

View File

@ -1293,11 +1293,9 @@ &usb_1_ss0_qmpphy {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss0_dwc3_hs {
@ -1325,11 +1323,9 @@ &usb_1_ss1_qmpphy {
};
&usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss1_dwc3_hs {

View File

@ -1571,11 +1571,9 @@ &usb_1_ss0_qmpphy {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss0_dwc3_hs {
@ -1603,11 +1601,9 @@ &usb_1_ss1_qmpphy {
};
&usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss1_dwc3_hs {
@ -1635,11 +1631,9 @@ &usb_1_ss2_qmpphy {
};
&usb_1_ss2 {
status = "okay";
};
&usb_1_ss2_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss2_dwc3_hs {

View File

@ -1413,11 +1413,9 @@ &usb_1_ss0_qmpphy {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss0_dwc3_hs {
@ -1458,11 +1456,9 @@ usb_1_ss2_qmpphy_out_dp: endpoint@0 {
/* Camera */
&usb_2 {
status = "okay";
};
&usb_2_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_2_hsphy {

View File

@ -1499,11 +1499,9 @@ &usb_1_ss0_qmpphy {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss0_dwc3_hs {
@ -1531,11 +1529,9 @@ &usb_1_ss1_qmpphy {
};
&usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss1_dwc3_hs {

View File

@ -1423,11 +1423,9 @@ &usb_1_ss0_qmpphy {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss0_dwc3_hs {
@ -1455,11 +1453,9 @@ &usb_1_ss1_qmpphy {
};
&usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss1_dwc3_hs {
@ -1487,11 +1483,9 @@ &usb_1_ss2_qmpphy {
};
&usb_1_ss2 {
status = "okay";
};
&usb_1_ss2_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss2_dwc3_hs {

View File

@ -1566,11 +1566,9 @@ &usb_1_ss0_qmpphy {
};
&usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss0_dwc3_hs {
@ -1598,11 +1596,9 @@ &usb_1_ss1_qmpphy {
};
&usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_ss1_dwc3_hs {
@ -1614,15 +1610,12 @@ &usb_1_ss1_qmpphy_out {
};
&usb_1_ss2 {
status = "okay";
};
&usb_1_ss2_dwc3 {
dr_mode = "host";
maximum-speed = "high-speed";
phys = <&usb_1_ss2_hsphy>;
phy-names = "usb2-phy";
status = "okay";
/delete-property/ port@1;
};
@ -1662,11 +1655,9 @@ usb_1_ss2_qmpphy_out_dp: endpoint@0 {
};
&usb_2 {
status = "okay";
};
&usb_2_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_2_hsphy {