New boards: FriendlyElec NanoPi Zero2, ArmSoM Sige1, Radxa ROCK 2A/2F,

HINLINK H66K / H68K .
 
 Interesting new peripherals: I guess the most interesting one is likely
 the NPU on RK3588. The rocket driver has been merged into both the DRM
 tree as well as mainline Mesa.
 Other stll interesting ones are DW-Displayport on RK3588, DSI on RK3576
 (missing soc pwm-support to be useful on most boards), thermal support
 and watchdog on RK3576.
 
 The rest peripheral additions on a number of boards (Beelink A1,
 Pine{phone,book}, rk3576-evb1-v10, Rock 5*, ...)
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmi9tiEQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgZQaB/47jWeYR6rOGm1+TDB20oxYtjIw4JQMH9wU
 vXUeVFjghAzdO2vkvKQ+q0WztNxyQMS1Gwq53mnHtqprA4q4SDLN29zkptt7cBRj
 8M3pi30RSKmOBGodceKNoCViK7/+mKBaQm66S2SaJaAWp9ZOwWQx1NsGLmiKe7uP
 XeMtD8ZHXyw7/NZ0zCcIfApX22A3EQdYc1zfjj6Xo3lDcQhyaI96PP/ZWKZHHS/o
 Tm76uVTOP9rk0IAwvG/51jcBRSRNg9+bSdoAuUb7hbRE4yG888wDcH/BDk6B9PwS
 yvu2gj8h1ZMPB686bZM+7IHt06FyjNYxl9ceLPOFIYTdTGYigN8T
 =wD74
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmjIDMUACgkQmmx57+YA
 GNn5Lw/+PkudDxFyHfbLeX+rCxgMqNZXdCPhb5BIElQo3drH75dsjUFdpYazOo5u
 hkcr4QOGMllaPKEtkjdyu1AbExCzft30d5dvtKxCmkDNKCkFWw5YHqrxg3KJteRz
 PDJMqUYPfhIn9xWm9D0ZFoKH+IV1iK7SF9STHjMzkaRI9rOpFoAvYZ18yfLhOPoZ
 +wrm7D4nQlUayjXYByBwoYd42dCpnaJYWNTcqISWnNKlPXxXUGatDA6lkWUfzqyx
 GZ+iHOYhevwyuXErjHwBKyseSrGmZScJ38v4PXM33frwE5KjsXh9UHb9lpaYgweE
 b2IsfLNzTSde/Ge2qZsIQHGs7AMf20AFVKgVzdAWh92d9hR3GRNPkakF8s8JwuSB
 PsA3p4JM2soHDCChwxjWEYndjgw/zzyATDfN3RrbV2uDNEySrfvHaogAktttCX9J
 TXnSFZQaiS+qCqkGip/sH8bQbRvcxgHMEl3705Nc6km5OANK6BhdAsfJJlCbsiT6
 D13YopeCpNRBGO/XJYdFWBGCuK2TiQ/Vbj0CJXXnlhiKw2byLw2VewI1GD52iuVx
 X1+xCDSkVVN7m/JEVXo8IDbKBUcT4XqPsTpKWX3A1N+LpwCDB3aeaHihjuB333R+
 t7arvRCcJARLDc8h13Q/buGo+SRiTwykwHH8uGvR9WlxuQ8mylI=
 =lmF1
 -----END PGP SIGNATURE-----

Merge tag 'v6.18-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

New boards: FriendlyElec NanoPi Zero2, ArmSoM Sige1, Radxa ROCK 2A/2F,
HINLINK H66K / H68K .

Interesting new peripherals: I guess the most interesting one is likely
the NPU on RK3588. The rocket driver has been merged into both the DRM
tree as well as mainline Mesa.
Other stll interesting ones are DW-Displayport on RK3588, DSI on RK3576
(missing soc pwm-support to be useful on most boards), thermal support
and watchdog on RK3576.

The rest peripheral additions on a number of boards (Beelink A1,
Pine{phone,book}, rk3576-evb1-v10, Rock 5*, ...)

* tag 'v6.18-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (46 commits)
  arm64: dts: rockchip: Enable DP2HDMI for ROCK 5 ITX
  arm64: dts: rockchip: Enable DisplayPort for rk3588s Cool Pi 4B
  arm64: dts: rockchip: Add DP1 for rk3588
  arm64: dts: rockchip: Add DP0 for rk3588
  arm64: dts: rockchip: Add FriendlyElec NanoPi Zero2
  dt-bindings: arm: rockchip: Add FriendlyElec NanoPi Zero2
  arm64: dts: rockchip: Add ArmSoM Sige1
  dt-bindings: arm: rockchip: Add ArmSoM Sige1
  arm64: dts: rockchip: Add Radxa ROCK 2A/2F
  dt-bindings: arm: rockchip: Add Radxa ROCK 2A/2F
  dt-bindings: soc: rockchip: add missing clock reference for rk3576-dcphy syscon
  arm64: dts: rockchip: add USB3 on Beelink A1
  arm64: dts: rockchip: add SPDIF audio to Beelink A1
  arm64: dts: rockchip: add IR receiver to rk3328-roc
  arm64: dts: rockchip: Further describe the WiFi for the Pinephone Pro
  arm64: dts: rockchip: Further describe the WiFi for the Pinebook Pro
  arm64: dts: rockchip: Enable the NPU on NanoPi R6C/R6S
  arm64: dts: rockchip: enable NPU on OPI5/5B
  arm64: dts: rockchip: Add Bluetooth on rk3576-evb1-v10
  arm64: dts: rockchip: Add WiFi on rk3576-evb1-v10
  ...

Link: https://lore.kernel.org/r/5241735.C4sosBPzcN@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2025-09-15 14:55:25 +02:00
commit 46cb19e52a
35 changed files with 3200 additions and 20 deletions

View File

@ -54,6 +54,11 @@ properties:
- const: ariaboard,photonicat
- const: rockchip,rk3568
- description: ArmSoM Sige1 board
items:
- const: armsom,sige1
- const: rockchip,rk3528
- description: ArmSoM Sige5 board
items:
- const: armsom,sige5
@ -320,6 +325,11 @@ properties:
- friendlyarm,nanopi-r6s
- const: rockchip,rk3588s
- description: FriendlyElec NanoPi Zero2
items:
- const: friendlyarm,nanopi-zero2
- const: rockchip,rk3528
- description: FriendlyElec NanoPC T6 series boards
items:
- enum:
@ -683,6 +693,13 @@ properties:
- const: hardkernel,odroid-m2
- const: rockchip,rk3588s
- description: HINLINK H66K / H68K
items:
- enum:
- hinlink,h66k
- hinlink,h68k
- const: rockchip,rk3568
- description: Hugsun X99 TV Box
items:
- const: hugsun,x99
@ -881,6 +898,13 @@ properties:
- const: radxa,rock
- const: rockchip,rk3188
- description: Radxa ROCK 2A/2F
items:
- enum:
- radxa,rock-2a
- radxa,rock-2f
- const: rockchip,rk3528
- description: Radxa ROCK Pi 4A/A+/B/B+/C
items:
- enum:

View File

@ -31,6 +31,7 @@ properties:
- rockchip,rk3568-usb2phy-grf
- rockchip,rk3576-bigcore-grf
- rockchip,rk3576-cci-grf
- rockchip,rk3576-dcphy-grf
- rockchip,rk3576-gpu-grf
- rockchip,rk3576-hdptxphy-grf
- rockchip,rk3576-litcore-grf
@ -300,6 +301,7 @@ allOf:
compatible:
contains:
enum:
- rockchip,rk3576-dcphy-grf
- rockchip,rk3576-vo1-grf
- rockchip,rk3588-vo-grf
- rockchip,rk3588-vo0-grf

View File

@ -650,6 +650,8 @@ patternProperties:
description: HiDeep Inc.
"^himax,.*":
description: Himax Technologies, Inc.
"^hinlink,.*":
description: Shenzhen HINLINK Technology Co., Ltd.
"^hirschmann,.*":
description: Hirschmann Automation and Control GmbH
"^hisi,.*":

View File

@ -89,7 +89,11 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-screen.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-armsom-sige1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-nanopi-zero2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-radxa-e20c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2f.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3562-evb2-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg-arc-d.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg-arc-s.dtb
@ -130,6 +134,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-hinlink-h66k.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-hinlink-h68k.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-lubancat-2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mecsbc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb

View File

@ -58,6 +58,24 @@ ir-receiver {
gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
linux,rc-map-name = "rc-beelink-gs1";
};
spdif_dit: spdif-dit {
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
};
spdif_sound: spdif-sound {
compatible = "simple-audio-card";
simple-audio-card,name = "SPDIF";
simple-audio-card,cpu {
sound-dai = <&spdif>;
};
simple-audio-card,codec {
sound-dai = <&spdif_dit>;
};
};
};
&analog_sound {
@ -325,6 +343,11 @@ &sdmmc {
status = "okay";
};
&spdif {
pinctrl-0 = <&spdifm0_tx>;
status = "okay";
};
&tsadc {
rockchip,hw-tshut-mode = <0>;
rockchip,hw-tshut-polarity = <0>;
@ -358,6 +381,11 @@ &usb_host0_ehci {
status = "okay";
};
&usbdrd3 {
dr_mode = "host";
status = "okay";
};
&vop {
status = "okay";
};

View File

@ -84,6 +84,13 @@ vcc_phy: regulator-vcc-phy {
regulator-boot-on;
};
ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&ir_int>;
pinctrl-names = "default";
};
leds {
compatible = "gpio-leds";
@ -300,6 +307,12 @@ &io_domains {
};
&pinctrl {
ir {
ir_int: ir-int {
rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;

View File

@ -883,6 +883,12 @@ vcc5v0_host_en_pin: vcc5v0-host-en-pin {
};
};
wifi {
wifi_host_wake_l: wifi-host-wake-l {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-bluetooth {
bt_wake_pin: bt-wake-pin {
rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
@ -940,7 +946,19 @@ &sdio0 {
pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
sd-uhs-sdr104;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
brcmf: wifi@1 {
compatible = "brcm,bcm4329-fmac";
reg = <1>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host-wake";
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_l>;
};
};
&sdhci {

View File

@ -689,6 +689,12 @@ vcc1v8_codec_en: vcc1v8-codec-en {
};
};
wifi {
wifi_host_wake_l: wifi-host-wake-l {
rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-bluetooth {
bt_wake_pin: bt-wake-pin {
rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
@ -715,7 +721,19 @@ &sdio0 {
pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
sd-uhs-sdr104;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
brcmf: wifi@1 {
compatible = "brcm,bcm4329-fmac";
reg = <1>;
interrupt-parent = <&gpio4>;
interrupts = <RK_PD0 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host-wake";
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_l>;
};
};
&pwm0 {

View File

@ -0,0 +1,464 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pwm/pwm.h>
#include "rk3528.dtsi"
/ {
model = "ArmSoM Sige1";
compatible = "armsom,sige1", "rockchip,rk3528";
aliases {
ethernet0 = &gmac1;
i2c0 = &i2c0;
mmc0 = &sdhci;
mmc1 = &sdmmc;
mmc2 = &sdio0;
serial0 = &uart0;
serial2 = &uart2;
};
chosen {
stdout-path = "serial0:1500000n8";
};
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
button-maskrom {
label = "MASKROM";
linux,code = <KEY_SETUP>;
press-threshold-microvolt = <0>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&g_led>, <&r_led>;
led-0 {
color = <LED_COLOR_ID_GREEN>;
default-state = "on";
function = LED_FUNCTION_HEARTBEAT;
gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
led-1 {
color = <LED_COLOR_ID_RED>;
default-state = "on";
function = LED_FUNCTION_STATUS;
gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
};
vcc0v6_ddr: regulator-0v6-vcc-ddr {
compatible = "regulator-fixed";
regulator-name = "vcc0v6_ddr";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <600000>;
vin-supply = <&vcc5v0_sys>;
};
vdd_0v9: regulator-0v9-vdd {
compatible = "regulator-fixed";
regulator-name = "vdd_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&vcc5v0_sys>;
};
vcc_ddr: regulator-1v1-vcc-ddr {
compatible = "regulator-fixed";
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc5v0_sys>;
};
vcc_1v8: regulator-1v8-vcc {
compatible = "regulator-fixed";
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
};
vcc1v8_ddr: regulator-1v8-vcc-ddr {
compatible = "regulator-fixed";
regulator-name = "vcc1v8_ddr";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc5v0_sys>;
};
vcc_3v3: regulator-3v3-vcc {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_dcin>;
};
vcc3v3_sd: regulator-3v3-vcc-sd {
compatible = "regulator-fixed";
gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_pwren_l>;
regulator-name = "vcc3v3_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3>;
};
vcc5v0_sys: regulator-5v0-vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc_dcin>;
};
vcc5v0_usb1_host: regulator-5v0-vcc-usb1-host {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb20_host1_drv_h>;
regulator-name = "vcc5v0_usb1_host";
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc5v0_usb2_host: regulator-5v0-vcc-usb2-host {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb20_host2_drv_h>;
regulator-name = "vcc5v0_usb2_host";
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc5v0_usb_otg: regulator-5v0-vcc-usb-otg {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb20_otg0_drv_h>;
regulator-name = "vcc5v0_usb_otg";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc_dcin: regulator-vcc-dcin {
compatible = "regulator-fixed";
regulator-name = "vcc_dcin";
regulator-always-on;
regulator-boot-on;
};
vccio_sd: regulator-vccio-sd {
compatible = "regulator-gpio";
gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_vol_ctrl_h>;
regulator-name = "vccio_sd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
states = <1800000 0x0>, <3300000 0x1>;
vin-supply = <&vcc5v0_sys>;
};
vdd_arm: regulator-vdd-arm {
compatible = "pwm-regulator";
pwms = <&pwm3 0 5000 PWM_POLARITY_INVERTED>;
pwm-supply = <&vcc5v0_sys>;
regulator-name = "vdd_arm";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <746000>;
regulator-max-microvolt = <1201000>;
regulator-settling-time-up-us = <250>;
};
vdd_logic: regulator-vdd-logic {
compatible = "pwm-regulator";
pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
pwm-supply = <&vcc5v0_sys>;
regulator-name = "vdd_logic";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <705000>;
regulator-max-microvolt = <1006000>;
regulator-settling-time-up-us = <250>;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&wifi_reg_on_h>, <&clkm1_32k_out>;
post-power-on-delay-ms = <200>;
reset-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>;
};
};
&cpu0 {
cpu-supply = <&vdd_arm>;
};
&cpu1 {
cpu-supply = <&vdd_arm>;
};
&cpu2 {
cpu-supply = <&vdd_arm>;
};
&cpu3 {
cpu-supply = <&vdd_arm>;
};
&gmac1 {
clock_in_out = "output";
phy-handle = <&rgmii_phy>;
phy-mode = "rgmii-id";
phy-supply = <&vcc_3v3>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
<&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>;
status = "okay";
};
&gpu {
mali-supply = <&vdd_logic>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0m0_xfer>;
status = "okay";
hym8563: rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
interrupt-parent = <&gpio4>;
interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&rtc_int_l>;
wakeup-source;
};
};
&mdio1 {
rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1_rstn_l>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>;
};
};
&pinctrl {
bluetooth {
bt_reg_on_h: bt-reg-on-h {
rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_wake_host_h: bt-wake-host-h {
rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
};
host_wake_bt_h: host-wake-bt-h {
rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
ethernet {
gmac1_rstn_l: gmac1-rstn-l {
rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
leds {
g_led: g-led {
rockchip,pins = <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
r_led: r-led {
rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
rtc {
rtc_int_l: rtc-int-l {
rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdmmc {
sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
sdmmc_pwren_l: sdmmc-pwren-l {
rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
usb20_host1_drv_h: usb20-host1-drv-h {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
usb20_host2_drv_h: usb20-host2-drv-h {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
usb20_otg0_drv_h: usb20-otg0-drv-h {
rockchip,pins = <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wifi {
wifi_reg_on_h: wifi-reg-on-h {
rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
wifi_wake_host_h: wifi-wake-host-h {
rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};
&pwm2 {
pinctrl-names = "default";
pinctrl-0 = <&pwm2m0_pins>;
status = "okay";
};
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pwm3m0_pins>;
status = "okay";
};
&saradc {
vref-supply = <&vcc_1v8>;
status = "okay";
};
&sdhci {
bus-width = <8>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
no-sd;
no-sdio;
non-removable;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vcc_1v8>;
status = "okay";
};
&sdio0 {
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
no-mmc;
no-sd;
non-removable;
sd-uhs-sdr104;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vcc_1v8>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
wifi@1 {
compatible = "brcm,bcm4329-fmac";
reg = <1>;
clocks = <&cru CLK_DEEPSLOW>;
clock-names = "lpo";
interrupt-parent = <&gpio1>;
interrupts = <RK_PA7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host-wake";
pinctrl-names = "default";
pinctrl-0 = <&wifi_wake_host_h>;
};
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
status = "okay";
};
&uart2 {
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&uart2m1_xfer>, <&uart2m1_ctsn>, <&uart2m1_rtsn>;
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "brcm,bcm43438-bt";
clocks = <&cru CLK_DEEPSLOW>;
clock-names = "lpo";
device-wakeup-gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
interrupt-parent = <&gpio1>;
interrupts = <RK_PC2 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host-wakeup";
pinctrl-names = "default";
pinctrl-0 = <&bt_reg_on_h>, <&bt_wake_host_h>, <&host_wake_bt_h>;
shutdown-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
vbat-supply = <&vcc_3v3>;
vddio-supply = <&vcc_1v8>;
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pwm/pwm.h>
#include "rk3528.dtsi"
/ {
model = "FriendlyElec NanoPi Zero2";
compatible = "friendlyarm,nanopi-zero2", "rockchip,rk3528";
aliases {
ethernet0 = &gmac1;
i2c1 = &i2c1;
mmc0 = &sdhci;
mmc1 = &sdmmc;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:1500000n8";
};
adc-keys-0 {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
button-maskrom {
label = "MASK";
linux,code = <KEY_SETUP>;
press-threshold-microvolt = <0>;
};
};
adc-keys-1 {
compatible = "adc-keys";
io-channels = <&saradc 1>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
button-recovery {
label = "RECOVERY";
linux,code = <KEY_VENDOR>;
press-threshold-microvolt = <0>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led1>, <&led_sys>;
led-0 {
color = <LED_COLOR_ID_RED>;
default-state = "on";
function = LED_FUNCTION_HEARTBEAT;
gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
led-1 {
color = <LED_COLOR_ID_GREEN>;
default-state = "on";
function = LED_FUNCTION_STATUS;
gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
};
vcc0v6_ddr: regulator-0v6-vcc-ddr {
compatible = "regulator-fixed";
regulator-name = "vcc0v6_ddr";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <600000>;
vin-supply = <&vcc5v0_sys>;
};
vdd_0v9: regulator-0v9-vdd {
compatible = "regulator-fixed";
regulator-name = "vdd_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&vcc5v0_sys>;
};
vcc_ddr: regulator-1v1-vcc-ddr {
compatible = "regulator-fixed";
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc5v0_sys>;
};
vcc_1v8: regulator-1v8-vcc {
compatible = "regulator-fixed";
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
};
vcc_3v3: regulator-3v3-vcc {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_sd: regulator-3v3-vcc-sd {
compatible = "regulator-fixed";
gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_pwren_l>;
regulator-name = "vcc3v3_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3>;
};
vcc5v0_sys: regulator-5v0-vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
usb2_host_5v: regulator-5v0-usb2-host {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb20_host1_pwren>;
regulator-name = "usb2_host_5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vccio_sd: regulator-vccio-sd {
compatible = "regulator-gpio";
gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_vol_ctrl_h>;
regulator-name = "vccio_sd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
states = <1800000 0x0>, <3300000 0x1>;
vin-supply = <&vcc5v0_sys>;
};
vdd_arm: regulator-vdd-arm {
compatible = "pwm-regulator";
pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
pwm-supply = <&vcc5v0_sys>;
regulator-name = "vdd_arm";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <746000>;
regulator-max-microvolt = <1201000>;
regulator-settling-time-up-us = <250>;
};
vdd_logic: regulator-vdd-logic {
compatible = "pwm-regulator";
pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
pwm-supply = <&vcc5v0_sys>;
regulator-name = "vdd_logic";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <705000>;
regulator-max-microvolt = <1006000>;
regulator-settling-time-up-us = <250>;
};
};
&cpu0 {
cpu-supply = <&vdd_arm>;
};
&cpu1 {
cpu-supply = <&vdd_arm>;
};
&cpu2 {
cpu-supply = <&vdd_arm>;
};
&cpu3 {
cpu-supply = <&vdd_arm>;
};
&gmac1 {
clock_in_out = "output";
phy-handle = <&rgmii_phy>;
phy-mode = "rgmii-id";
phy-supply = <&vcc_3v3>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
<&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>;
status = "okay";
};
&gpu {
mali-supply = <&vdd_logic>;
status = "okay";
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1m0_xfer>;
status = "okay";
hym8563: rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
interrupt-parent = <&gpio4>;
interrupts = <RK_PC1 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&rtc_int_l>;
wakeup-source;
};
};
&mdio1 {
rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1_rstn_l>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
};
};
&pinctrl {
ethernet {
gmac1_rstn_l: gmac1-rstn-l {
rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
leds {
led1: led1 {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
led_sys: led-sys {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
rtc {
rtc_int_l: rtc-int-l {
rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdmmc {
sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
sdmmc_pwren_l: sdmmc-pwren-l {
rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
usb20_host1_pwren: usb20-host1-pwren {
rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pwm1m0_pins>;
status = "okay";
};
&pwm2 {
pinctrl-names = "default";
pinctrl-0 = <&pwm2m0_pins>;
status = "okay";
};
&saradc {
vref-supply = <&vcc_1v8>;
status = "okay";
};
&sdhci {
bus-width = <8>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
no-sd;
no-sdio;
non-removable;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vcc_1v8>;
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
status = "okay";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pwm/pwm.h>
#include "rk3528.dtsi"
/ {
aliases {
i2c1 = &i2c1;
mmc0 = &sdhci;
mmc1 = &sdmmc;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:1500000n8";
};
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
button-maskrom {
label = "MASKROM";
linux,code = <KEY_SETUP>;
press-threshold-microvolt = <0>;
};
};
leds: leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&state_led_b>;
led-0 {
color = <LED_COLOR_ID_BLUE>;
default-state = "on";
function = LED_FUNCTION_HEARTBEAT;
gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
vdd_0v9: regulator-0v9-vdd {
compatible = "regulator-fixed";
regulator-name = "vdd_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&vcc5v0_sys>;
};
vcc_ddr: regulator-1v1-vcc-ddr {
compatible = "regulator-fixed";
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc5v0_sys>;
};
vcc_1v8: regulator-1v8-vcc {
compatible = "regulator-fixed";
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
};
vcc_3v3: regulator-3v3-vcc {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
vcc_wifi: regulator-3v3-vcc-wifi {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_wifi_pwr>;
regulator-name = "vcc_wifi";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3>;
};
vcc5v0_sys: regulator-5v0-vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vcc5v0_usb20: regulator-5v0-vcc-usb20 {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_host_en>;
regulator-name = "vcc5v0_usb20";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vccio_sd: regulator-vccio-sd {
compatible = "regulator-gpio";
gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_vol_ctrl_h>;
regulator-name = "vccio_sd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
states = <1800000 0x0>, <3300000 0x1>;
vin-supply = <&vcc5v0_sys>;
};
vdd_arm: regulator-vdd-arm {
compatible = "pwm-regulator";
pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
pwm-supply = <&vcc5v0_sys>;
regulator-name = "vdd_arm";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <746000>;
regulator-max-microvolt = <1201000>;
regulator-settling-time-up-us = <250>;
};
vdd_logic: regulator-vdd-logic {
compatible = "pwm-regulator";
pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
pwm-supply = <&vcc5v0_sys>;
regulator-name = "vdd_logic";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <705000>;
regulator-max-microvolt = <1006000>;
regulator-settling-time-up-us = <250>;
};
rfkill {
compatible = "rfkill-gpio";
label = "rfkill-wlan";
pinctrl-names = "default";
pinctrl-0 = <&wifi_reg_on_h>;
radio-type = "wlan";
shutdown-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
};
};
&cpu0 {
cpu-supply = <&vdd_arm>;
};
&cpu1 {
cpu-supply = <&vdd_arm>;
};
&cpu2 {
cpu-supply = <&vdd_arm>;
};
&cpu3 {
cpu-supply = <&vdd_arm>;
};
&gpu {
mali-supply = <&vdd_logic>;
status = "okay";
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1m0_xfer>;
status = "okay";
eeprom@50 {
compatible = "belling,bl24c16a", "atmel,24c16";
reg = <0x50>;
pagesize = <16>;
read-only;
vcc-supply = <&vcc_3v3>;
};
};
&pinctrl {
bluetooth {
bt_wake_host_h: bt-wake-host-h {
rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
};
host_wake_bt_h: host-wake-bt-h {
rockchip,pins = <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
leds {
state_led_b: state-led-b {
rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdmmc {
sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
usb_host_en: usb-host-en {
rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wifi {
usb_wifi_pwr: usb-wifi-pwr {
rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
wifi_reg_on_h: wifi-reg-on-h {
rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
wifi_wake_host_h: wifi-wake-host-h {
rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pwm1m0_pins>;
status = "okay";
};
&pwm2 {
pinctrl-names = "default";
pinctrl-0 = <&pwm2m0_pins>;
status = "okay";
};
&saradc {
vref-supply = <&vcc_1v8>;
status = "okay";
};
&sdhci {
bus-width = <8>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
no-sd;
no-sdio;
non-removable;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vcc_1v8>;
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
max-frequency = <100000000>;
sd-uhs-sdr104;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
status = "okay";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include "rk3528-rock-2.dtsi"
/ {
model = "Radxa ROCK 2A";
compatible = "radxa,rock-2a", "rockchip,rk3528";
aliases {
ethernet0 = &gmac1;
};
vcc5v0_usb30_otg: regulator-5v0-vcc-usb30-otg {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_otg_en>;
regulator-name = "vcc5v0_usb30_otg";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
};
&gmac1 {
clock_in_out = "output";
phy-handle = <&rgmii_phy>;
phy-mode = "rgmii-id";
phy-supply = <&vcc_3v3>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
<&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>;
status = "okay";
};
&leds {
pinctrl-names = "default";
pinctrl-0 = <&state_led_b>, <&sys_led_g>;
led-1 {
color = <LED_COLOR_ID_GREEN>;
default-state = "on";
function = LED_FUNCTION_STATUS;
gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
};
};
&mdio1 {
rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1_rstn_l>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
};
};
&pinctrl {
ethernet {
gmac1_rstn_l: gmac1-rstn-l {
rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
leds {
sys_led_g: sys-led-g {
rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
usb_otg_en: usb-otg-en {
rockchip,pins = <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

View File

@ -0,0 +1,10 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include "rk3528-rock-2.dtsi"
/ {
model = "Radxa ROCK 2F";
compatible = "radxa,rock-2f", "rockchip,rk3528";
};

View File

@ -9,6 +9,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/clock/rockchip,rk3528-cru.h>
#include <dt-bindings/power/rockchip,rk3528-power.h>
#include <dt-bindings/reset/rockchip,rk3528-cru.h>
/ {
@ -154,6 +155,7 @@ gpio1: gpio@ffaf0000 {
gpio-ranges = <&pinctrl 0 32 32>;
interrupt-controller;
#interrupt-cells = <2>;
power-domains = <&power RK3528_PD_VPU>;
};
gpio2: gpio@ffb00000 {
@ -166,6 +168,7 @@ gpio2: gpio@ffb00000 {
gpio-ranges = <&pinctrl 0 64 32>;
interrupt-controller;
#interrupt-cells = <2>;
power-domains = <&power RK3528_PD_VO>;
};
gpio3: gpio@ffb10000 {
@ -178,6 +181,7 @@ gpio3: gpio@ffb10000 {
gpio-ranges = <&pinctrl 0 96 32>;
interrupt-controller;
#interrupt-cells = <2>;
power-domains = <&power RK3528_PD_VPU>;
};
gpio4: gpio@ffb20000 {
@ -190,6 +194,7 @@ gpio4: gpio@ffb20000 {
gpio-ranges = <&pinctrl 0 128 32>;
interrupt-controller;
#interrupt-cells = <2>;
power-domains = <&power RK3528_PD_RKVENC>;
};
};
@ -416,6 +421,11 @@ vpu_grf: syscon@ff340000 {
reg = <0x0 0xff340000 0x0 0x8000>;
};
pipe_phy_grf: syscon@ff348000 {
compatible = "rockchip,rk3528-pipe-phy-grf", "syscon";
reg = <0x0 0xff348000 0x0 0x8000>;
};
vo_grf: syscon@ff360000 {
compatible = "rockchip,rk3528-vo-grf", "syscon";
reg = <0x0 0xff360000 0x0 0x10000>;
@ -480,8 +490,8 @@ power: power-controller {
#size-cells = <0>;
/* These power domains are grouped by VD_GPU */
power-domain@4 {
reg = <4>;
power-domain@RK3528_PD_GPU {
reg = <RK3528_PD_GPU>;
clocks = <&cru ACLK_GPU_MALI>,
<&cru PCLK_GPU_ROOT>;
pm_qos = <&qos_gpu_m0>,
@ -490,20 +500,19 @@ power-domain@4 {
};
/* These power domains are grouped by VD_LOGIC */
power-domain@5 {
reg = <5>;
power-domain@RK3528_PD_RKVDEC {
reg = <RK3528_PD_RKVDEC>;
pm_qos = <&qos_rkvdec>;
#power-domain-cells = <0>;
status = "disabled";
};
power-domain@6 {
reg = <6>;
power-domain@RK3528_PD_RKVENC {
reg = <RK3528_PD_RKVENC>;
pm_qos = <&qos_rkvenc>;
#power-domain-cells = <0>;
status = "disabled";
};
power-domain@7 {
reg = <7>;
power-domain@RK3528_PD_VO {
reg = <RK3528_PD_VO>;
pm_qos = <&qos_gmac0>,
<&qos_hdcp>,
<&qos_jpegdec>,
@ -514,10 +523,9 @@ power-domain@7 {
<&qos_vdpp>,
<&qos_vop>;
#power-domain-cells = <0>;
status = "disabled";
};
power-domain@8 {
reg = <8>;
power-domain@RK3528_PD_VPU {
reg = <RK3528_PD_VPU>;
pm_qos = <&qos_emmc>,
<&qos_fspi>,
<&qos_gmac1>,
@ -528,7 +536,6 @@ power-domain@8 {
<&qos_usb3otg>,
<&qos_vpu>;
#power-domain-cells = <0>;
status = "disabled";
};
};
};
@ -556,7 +563,7 @@ gpu: gpu@ff700000 {
"pp1",
"ppmmu1";
operating-points-v2 = <&gpu_opp_table>;
power-domains = <&power 4>;
power-domains = <&power RK3528_PD_GPU>;
resets = <&cru SRST_A_GPU>;
status = "disabled";
};
@ -570,6 +577,7 @@ spi0: spi@ff9c0000 {
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 25>, <&dmac 24>;
dma-names = "tx", "rx";
power-domains = <&power RK3528_PD_RKVENC>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -584,6 +592,7 @@ spi1: spi@ff9d0000 {
interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 31>, <&dmac 30>;
dma-names = "tx", "rx";
power-domains = <&power RK3528_PD_VPU>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -608,6 +617,7 @@ uart1: serial@ff9f8000 {
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 11>, <&dmac 10>;
power-domains = <&power RK3528_PD_RKVENC>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@ -620,6 +630,7 @@ uart2: serial@ffa00000 {
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 13>, <&dmac 12>;
power-domains = <&power RK3528_PD_VPU>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@ -632,6 +643,7 @@ uart3: serial@ffa08000 {
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 15>, <&dmac 14>;
power-domains = <&power RK3528_PD_RKVENC>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@ -644,6 +656,7 @@ uart4: serial@ffa10000 {
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 17>, <&dmac 16>;
power-domains = <&power RK3528_PD_VO>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@ -656,6 +669,7 @@ uart5: serial@ffa18000 {
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 19>, <&dmac 18>;
power-domains = <&power RK3528_PD_VPU>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@ -668,6 +682,7 @@ uart6: serial@ffa20000 {
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 21>, <&dmac 20>;
power-domains = <&power RK3528_PD_VPU>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@ -680,6 +695,7 @@ uart7: serial@ffa28000 {
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 23>, <&dmac 22>;
power-domains = <&power RK3528_PD_VPU>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@ -692,6 +708,7 @@ i2c0: i2c@ffa50000 {
clocks = <&cru CLK_I2C0>, <&cru PCLK_I2C0>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&power RK3528_PD_RKVENC>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -704,6 +721,7 @@ i2c1: i2c@ffa58000 {
clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&power RK3528_PD_RKVENC>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -730,6 +748,7 @@ i2c3: i2c@ffa68000 {
clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&power RK3528_PD_VPU>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -744,6 +763,7 @@ i2c4: i2c@ffa70000 {
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c4_xfer>;
power-domains = <&power RK3528_PD_VO>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -756,6 +776,7 @@ i2c5: i2c@ffa78000 {
clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&power RK3528_PD_VPU>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -768,6 +789,7 @@ i2c6: i2c@ffa80000 {
clocks = <&cru CLK_I2C6>, <&cru PCLK_I2C6>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&power RK3528_PD_VPU>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -782,6 +804,7 @@ i2c7: i2c@ffa88000 {
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c7_xfer>;
power-domains = <&power RK3528_PD_VO>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -873,6 +896,7 @@ saradc: adc@ffae0000 {
clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
clock-names = "saradc", "apb_pclk";
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&power RK3528_PD_VPU>;
resets = <&cru SRST_P_SARADC>;
reset-names = "saradc-apb";
#io-channel-cells = <1>;
@ -893,6 +917,7 @@ gmac0: ethernet@ffbd0000 {
interrupt-names = "macirq", "eth_wake_irq";
phy-handle = <&rmii0_phy>;
phy-mode = "rmii";
power-domains = <&power RK3528_PD_VO>;
resets = <&cru SRST_A_MAC_VO>;
reset-names = "stmmaceth";
rockchip,grf = <&vo_grf>;
@ -951,6 +976,7 @@ gmac1: ethernet@ffbe0000 {
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_wake_irq";
power-domains = <&power RK3528_PD_VPU>;
resets = <&cru SRST_A_MAC>;
reset-names = "stmmaceth";
rockchip,grf = <&vpu_grf>;
@ -1001,6 +1027,7 @@ sdhci: mmc@ffbf0000 {
pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8>, <&emmc_clk>, <&emmc_cmd>,
<&emmc_strb>;
power-domains = <&power RK3528_PD_VPU>;
resets = <&cru SRST_C_EMMC>, <&cru SRST_H_EMMC>,
<&cru SRST_A_EMMC>, <&cru SRST_B_EMMC>,
<&cru SRST_T_EMMC>;
@ -1022,6 +1049,7 @@ sdio0: mmc@ffc10000 {
max-frequency = <200000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4>, <&sdio0_clk>, <&sdio0_cmd>;
power-domains = <&power RK3528_PD_VPU>;
resets = <&cru SRST_H_SDIO0>;
reset-names = "reset";
status = "disabled";
@ -1041,6 +1069,7 @@ sdio1: mmc@ffc20000 {
max-frequency = <200000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdio1_bus4>, <&sdio1_clk>, <&sdio1_cmd>;
power-domains = <&power RK3528_PD_VPU>;
resets = <&cru SRST_H_SDIO1>;
reset-names = "reset";
status = "disabled";
@ -1061,6 +1090,7 @@ sdmmc: mmc@ffc30000 {
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_bus4>, <&sdmmc_clk>, <&sdmmc_cmd>,
<&sdmmc_det>;
power-domains = <&power RK3528_PD_VO>;
resets = <&cru SRST_H_SDMMC0>;
reset-names = "reset";
rockchip,default-sample-phase = <90>;
@ -1084,6 +1114,25 @@ dmac: dma-controller@ffd60000 {
#dma-cells = <1>;
arm,pl330-periph-burst;
};
combphy: phy@ffdc0000 {
compatible = "rockchip,rk3528-naneng-combphy";
reg = <0x0 0xffdc0000 0x0 0x10000>;
assigned-clocks = <&cru CLK_REF_PCIE_INNER_PHY>;
assigned-clock-rates = <100000000>;
clocks = <&cru CLK_REF_PCIE_INNER_PHY>,
<&cru PCLK_PCIE_PHY>,
<&cru PCLK_PIPE_GRF>;
clock-names = "ref", "apb", "pipe";
power-domains = <&power RK3528_PD_VPU>;
resets = <&cru SRST_PCIE_PIPE_PHY>,
<&cru SRST_P_PCIE_PHY>;
reset-names = "phy", "apb";
#phy-cells = <1>;
rockchip,pipe-grf = <&vpu_grf>;
rockchip,pipe-phy-grf = <&pipe_phy_grf>;
status = "disabled";
};
};
};

View File

@ -0,0 +1,10 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include "rk3568-hinlink-opc.dtsi"
/ {
model = "HINLINK H66K";
compatible = "hinlink,h66k", "rockchip,rk3568";
};

View File

@ -0,0 +1,83 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include "rk3568-hinlink-opc.dtsi"
/ {
model = "HINLINK H68K";
compatible = "hinlink,h68k", "rockchip,rk3568";
aliases {
ethernet0 = &gmac0;
ethernet1 = &gmac1;
};
};
&gmac0 {
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
assigned-clock-rates = <0>, <125000000>;
clock_in_out = "output";
phy-handle = <&rgmii_phy0>;
phy-mode = "rgmii-id";
phy-supply = <&vcc3v3_sys>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus
&gmac0_rstn>;
status = "okay";
};
&gmac1 {
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
assigned-clock-rates = <0>, <125000000>;
clock_in_out = "output";
phy-handle = <&rgmii_phy1>;
phy-mode = "rgmii-id";
phy-supply = <&vcc3v3_sys>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1m1_miim
&gmac1m1_tx_bus2
&gmac1m1_rx_bus2
&gmac1m1_rgmii_clk
&gmac1m1_rgmii_bus
&gmac1_rstn>;
status = "okay";
};
&mdio0 {
rgmii_phy0: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
};
};
&mdio1 {
rgmii_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
};
};
&pinctrl {
gmac {
gmac0_rstn: gmac0-rstn {
rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
gmac1_rstn: gmac1-rstn {
rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

View File

@ -0,0 +1,666 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/soc/rockchip,vop2.h>
#include "rk3568.dtsi"
/ {
aliases {
mmc0 = &sdhci;
mmc1 = &sdmmc0;
};
chosen {
stdout-path = "serial2:1500000n8";
};
hdmi-con {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pwm3_ir_m0>;
};
keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&factory>;
button-factory {
label = "factory";
linux,code = <KEY_RESTART>;
gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
debounce-interval = <50>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&green_led>, <&red_led>, <&work_led>;
led-0 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WAN;
gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "netdev";
};
led-1 {
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_DISK;
gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
};
led-2 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
};
vcc0v9_2g5: regulator-0v9-vcc-2g5 {
compatible = "regulator-fixed";
regulator-name = "vcc0v9_2g5";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&vcc5v0_sys>;
};
vcc12v_dcinp: regulator-12v-vcc-dcinp {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcinp";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
vcc3v3_pi6c_05: regulator-3v3-vcc-pi6c-05 {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lan_power_en>;
regulator-name = "vcc3v3_pi6c_05";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_sd: regulator-3v3-vcc-sd {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&sd_pwren>;
regulator-name = "vcc3v3_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc3v3_sys>;
};
vcc3v3_sys: regulator-3v3-vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
vcc5v0_sys: regulator-5v0-vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcinp>;
};
vcc5v0_usb30_otg0: regulator-5v0-vcc-usb30-otg0 {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_power_en>;
regulator-name = "vcc5v0_usb30_otg0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
};
&combphy0 {
status = "okay";
};
&combphy1 {
status = "okay";
};
&combphy2 {
status = "okay";
};
&cpu0 {
cpu-supply = <&vdd_cpu>;
};
&cpu1 {
cpu-supply = <&vdd_cpu>;
};
&cpu2 {
cpu-supply = <&vdd_cpu>;
};
&cpu3 {
cpu-supply = <&vdd_cpu>;
};
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
};
&hdmi {
avdd-0v9-supply = <&vdda0v9_image>;
avdd-1v8-supply = <&vcca1v8_image>;
status = "okay";
};
&hdmi_in {
hdmi_in_vp0: endpoint {
remote-endpoint = <&vp0_out_hdmi>;
};
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&hdmi_sound {
status = "okay";
};
&i2c0 {
status = "okay";
vdd_cpu: regulator@1c {
compatible = "tcs,tcs4525";
reg = <0x1c>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1150000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
rk809: pmic@20 {
compatible = "rockchip,rk809";
reg = <0x20>;
#clock-cells = <1>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int>;
system-power-controller;
wakeup-source;
vcc1-supply = <&vcc3v3_sys>;
vcc2-supply = <&vcc3v3_sys>;
vcc3-supply = <&vcc3v3_sys>;
vcc4-supply = <&vcc3v3_sys>;
vcc5-supply = <&vcc3v3_sys>;
vcc6-supply = <&vcc3v3_sys>;
vcc7-supply = <&vcc3v3_sys>;
vcc8-supply = <&vcc3v3_sys>;
vcc9-supply = <&vcc3v3_sys>;
regulators {
vdd_logic: DCDC_REG1 {
regulator-name = "vdd_logic";
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu: DCDC_REG2 {
regulator-name = "vdd_gpu";
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vdd_npu: DCDC_REG4 {
regulator-name = "vdd_npu";
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8: DCDC_REG5 {
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_image: LDO_REG1 {
regulator-name = "vdda0v9_image";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda_0v9: LDO_REG2 {
regulator-name = "vdda_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_pmu: LDO_REG3 {
regulator-name = "vdda0v9_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vccio_acodec: LDO_REG4 {
regulator-name = "vccio_acodec";
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd: LDO_REG5 {
regulator-name = "vccio_sd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_pmu: LDO_REG6 {
regulator-name = "vcc3v3_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcca_1v8: LDO_REG7 {
regulator-name = "vcca_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca1v8_pmu: LDO_REG8 {
regulator-name = "vcca1v8_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcca1v8_image: LDO_REG9 {
regulator-name = "vcca1v8_image";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v3: SWITCH_REG1 {
regulator-name = "vcc_3v3";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3: SWITCH_REG2 {
regulator-name = "vcc3v3";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2m1_xfer>;
status = "okay";
};
&i2s0_8ch {
status = "okay";
};
&pcie2x1 {
pinctrl-names = "default";
pinctrl-0 = <&wifi_perstn>;
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pi6c_05>;
status = "okay";
};
&pcie30phy {
data-lanes = <1 2>;
status = "okay";
};
&pcie3x1 {
num-lanes = <1>;
pinctrl-names = "default";
pinctrl-0 = <&lan_resetb>;
reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pi6c_05>;
status = "okay";
};
&pcie3x2 {
num-lanes = <1>;
pinctrl-names = "default";
pinctrl-0 = <&lan_reseta>;
reset-gpios = <&gpio2 RK_PD0 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pi6c_05>;
status = "okay";
};
&pinctrl {
keys {
factory: factory {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
leds {
green_led: green-led {
rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
red_led: red-led {
rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
};
work_led: work-led {
rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
ir {
pwm3_ir_m0: pwm3-ir-m0 {
rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
mmc {
sd_pwren: sd-pwren {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
lan_power_en: lan-power-en {
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
};
lan_reseta: lan-reseta {
rockchip,pins = <2 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
};
lan_resetb: lan-resetb {
rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
wifi_perstn: wifi-perstn {
rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
usb_power_en: usb-power-en {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pmu_io_domains {
pmuio1-supply = <&vcc3v3_pmu>;
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio2-supply = <&vcc_1v8>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
status = "okay";
};
&pwm0 {
status = "okay";
};
&saradc {
vref-supply = <&vcca_1v8>;
status = "okay";
};
/* Via Type-C adapter */
&sata0 {
status = "okay";
};
&sdhci {
bus-width = <8>;
cap-mmc-highspeed;
max-frequency = <200000000>;
mmc-hs200-1_8v;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vcc_1v8>;
status = "okay";
};
&sdmmc0 {
bus-width = <4>;
cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
sd-uhs-sdr50;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
};
&tsadc {
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <0>;
status = "okay";
};
&uart2 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&usb_host1_xhci {
status = "okay";
};
&usb2phy0 {
status = "okay";
};
&usb2phy0_host {
phy-supply = <&vcc5v0_usb30_otg0>;
status = "okay";
};
&usb2phy1 {
status = "okay";
};
&usb2phy1_host {
phy-supply = <&vcc5v0_usb30_otg0>;
status = "okay";
};
&usb2phy1_otg {
phy-supply = <&vcc5v0_usb30_otg0>;
status = "okay";
};
&vop {
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
status = "okay";
};
&vop_mmu {
status = "okay";
};
&vp0 {
vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
reg = <ROCKCHIP_VOP2_EP_HDMI0>;
remote-endpoint = <&hdmi_in_vp0>;
};
};

View File

@ -232,6 +232,20 @@ vcc_ufs_s0: regulator-vcc-ufs-s0 {
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_sys>;
};
vcc_wifi_reg_on: regulator-wifi-reg-on {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&wifi_reg_on>;
pinctrl-names = "default";
regulator-name = "wifi_reg_on";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_1v8_s3>;
};
};
&cpu_l0 {
@ -242,6 +256,10 @@ &cpu_b0 {
cpu-supply = <&vdd_cpu_big_s0>;
};
&combphy0_ps {
status = "okay";
};
&combphy1_psu {
status = "okay";
};
@ -680,6 +698,22 @@ regulator-state-mem {
};
};
&i2c2 {
status = "okay";
hym8563: rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
clock-output-names = "hym8563";
interrupt-parent = <&gpio0>;
interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&rtc_int>;
wakeup-source;
#clock-cells = <0>;
};
};
&mdio0 {
rgmii_phy0: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
@ -696,6 +730,30 @@ rgmii_phy1: phy@1 {
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_rst>;
reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc_3v3_s3>;
status = "okay";
pcie@0,0 {
reg = <0x0 0 0 0 0>;
bus-range = <0x0 0xf>;
device_type = "pci";
ranges;
#address-cells = <3>;
#size-cells = <2>;
wifi: wifi@0,0 {
compatible = "pci14e4,449d";
reg = <0x10000 0 0 0 0>;
clocks = <&hym8563>;
clock-names = "lpo";
};
};
};
&pcie1 {
reset-gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie1>;
@ -708,6 +766,32 @@ &pcie1 {
};
&pinctrl {
bluetooth {
bt_reg_on: bt-reg-on {
rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
};
bt_wake_host: bt-wake-host {
rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>;
};
host_wake_bt: host-wake-bt {
rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
hym8563 {
rtc_int: rtc-int {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pcie0 {
pcie0_rst: pcie0-rst {
rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
usb_host_pwren: usb-host-pwren {
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
@ -721,6 +805,28 @@ usbc0_int: usbc0-int {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
wifi {
wifi_reg_on: wifi-reg-on {
rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
};
wifi_wake_host: wifi-wake-host {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};
&sdhci {
bus-width = <8>;
full-pwr-cycle-in-suspend;
max-frequency = <200000000>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
no-sdio;
no-sd;
non-removable;
status = "okay";
};
&sdmmc {
@ -763,6 +869,27 @@ &uart0 {
status = "okay";
};
&uart4 {
pinctrl-0 = <&uart4m1_xfer &uart4m1_ctsn &uart4m1_rtsn>;
pinctrl-names = "default";
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "brcm,bcm43438-bt";
clocks = <&hym8563>;
clock-names = "lpo";
device-wakeup-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PB1 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&bt_reg_on &bt_wake_host &host_wake_bt>;
pinctrl-names = "default";
shutdown-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
vbat-supply = <&vcc_3v3_s3>;
vddio-supply = <&vcc_1v8_s3>;
};
};
&ufshc {
status = "okay";
};

View File

@ -107,6 +107,18 @@ vcc1v8_ufs_vccq2_s0: regulator-vcc1v8-ufs-vccq2-s0 {
vin-supply = <&vcc_1v8_s3>;
};
vcc3v3_lcd_s0: regulator-vcc3v3-lcd-s0 {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_pwren_h>;
regulator-name = "vcc3v3-lcd-s0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_s3>;
};
vcc3v3_pcie: regulator-vcc3v3-pcie {
compatible = "regulator-fixed";
enable-active-high;
@ -715,6 +727,10 @@ rtc_int_l: rtc-int-l {
};
power {
lcd_pwren_h: lcd-pwren-h {
rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5vd_en: vcc5vd-en {
rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
};

View File

@ -11,6 +11,7 @@
#include <dt-bindings/power/rockchip,rk3576-power.h>
#include <dt-bindings/reset/rockchip,rk3576-cru.h>
#include <dt-bindings/soc/rockchip,boot-mode.h>
#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "rockchip,rk3576";
@ -113,9 +114,9 @@ cpu_l0: cpu@0 {
capacity-dmips-mhz = <485>;
clocks = <&scmi_clk SCMI_ARMCLK_L>;
operating-points-v2 = <&cluster0_opp_table>;
#cooling-cells = <2>;
dynamic-power-coefficient = <120>;
cpu-idle-states = <&CPU_SLEEP>;
#cooling-cells = <2>;
};
cpu_l1: cpu@1 {
@ -127,6 +128,7 @@ cpu_l1: cpu@1 {
clocks = <&scmi_clk SCMI_ARMCLK_L>;
operating-points-v2 = <&cluster0_opp_table>;
cpu-idle-states = <&CPU_SLEEP>;
#cooling-cells = <2>;
};
cpu_l2: cpu@2 {
@ -138,6 +140,7 @@ cpu_l2: cpu@2 {
clocks = <&scmi_clk SCMI_ARMCLK_L>;
operating-points-v2 = <&cluster0_opp_table>;
cpu-idle-states = <&CPU_SLEEP>;
#cooling-cells = <2>;
};
cpu_l3: cpu@3 {
@ -149,6 +152,7 @@ cpu_l3: cpu@3 {
clocks = <&scmi_clk SCMI_ARMCLK_L>;
operating-points-v2 = <&cluster0_opp_table>;
cpu-idle-states = <&CPU_SLEEP>;
#cooling-cells = <2>;
};
cpu_b0: cpu@100 {
@ -159,9 +163,9 @@ cpu_b0: cpu@100 {
capacity-dmips-mhz = <1024>;
clocks = <&scmi_clk SCMI_ARMCLK_B>;
operating-points-v2 = <&cluster1_opp_table>;
#cooling-cells = <2>;
dynamic-power-coefficient = <320>;
cpu-idle-states = <&CPU_SLEEP>;
#cooling-cells = <2>;
};
cpu_b1: cpu@101 {
@ -173,6 +177,7 @@ cpu_b1: cpu@101 {
clocks = <&scmi_clk SCMI_ARMCLK_B>;
operating-points-v2 = <&cluster1_opp_table>;
cpu-idle-states = <&CPU_SLEEP>;
#cooling-cells = <2>;
};
cpu_b2: cpu@102 {
@ -184,6 +189,7 @@ cpu_b2: cpu@102 {
clocks = <&scmi_clk SCMI_ARMCLK_B>;
operating-points-v2 = <&cluster1_opp_table>;
cpu-idle-states = <&CPU_SLEEP>;
#cooling-cells = <2>;
};
cpu_b3: cpu@103 {
@ -195,6 +201,7 @@ cpu_b3: cpu@103 {
clocks = <&scmi_clk SCMI_ARMCLK_B>;
operating-points-v2 = <&cluster1_opp_table>;
cpu-idle-states = <&CPU_SLEEP>;
#cooling-cells = <2>;
};
idle-states {
@ -520,6 +527,143 @@ psci {
method = "smc";
};
thermal_zones: thermal-zones {
/* sensor near the center of the SoC */
package_thermal: package-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tsadc 0>;
trips {
package_crit: package-crit {
temperature = <115000>;
hysteresis = <0>;
type = "critical";
};
};
};
/* sensor for cluster1 (big Cortex-A72 cores) */
bigcore_thermal: bigcore-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&tsadc 1>;
trips {
bigcore_alert: bigcore-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
bigcore_crit: bigcore-crit {
temperature = <115000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&bigcore_alert>;
cooling-device =
<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu_b3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
/* sensor for cluster0 (little Cortex-A53 cores) */
littlecore_thermal: littlecore-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&tsadc 2>;
trips {
littlecore_alert: littlecore-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
littlecore_crit: littlecore-crit {
temperature = <115000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&littlecore_alert>;
cooling-device =
<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
gpu_thermal: gpu-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&tsadc 3>;
trips {
gpu_alert: gpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
gpu_crit: gpu-crit {
temperature = <115000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&gpu_alert>;
cooling-device =
<&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
npu_thermal: npu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tsadc 4>;
trips {
npu_crit: npu-crit {
temperature = <115000>;
hysteresis = <0>;
type = "critical";
};
};
};
ddr_thermal: ddr-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tsadc 5>;
trips {
ddr_crit: ddr-crit {
temperature = <115000>;
hysteresis = <0>;
type = "critical";
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
@ -822,6 +966,12 @@ hdptxphy_grf: syscon@26032000 {
reg = <0x0 0x26032000 0x0 0x100>;
};
mipidcphy_grf: syscon@26034000 {
compatible = "rockchip,rk3576-dcphy-grf", "syscon";
reg = <0x0 0x26034000 0x0 0x2000>;
clocks = <&cru PCLK_PMUPHY_ROOT>;
};
vo1_grf: syscon@26036000 {
compatible = "rockchip,rk3576-vo1-grf", "syscon";
reg = <0x0 0x26036000 0x0 0x100>;
@ -1239,6 +1389,34 @@ sai6: sai@27d50000 {
status = "disabled";
};
dsi: dsi@27d80000 {
compatible = "rockchip,rk3576-mipi-dsi2";
reg = <0x0 0x27d80000 0x0 0x10000>;
interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_DSIHOST0>, <&cru CLK_DSIHOST0>;
clock-names = "pclk", "sys";
power-domains = <&power RK3576_PD_VO0>;
resets = <&cru SRST_P_DSIHOST0>;
reset-names = "apb";
phys = <&mipidcphy PHY_TYPE_DPHY>;
phy-names = "dcphy";
rockchip,grf = <&vo0_grf>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
dsi_in: port@0 {
reg = <0>;
};
dsi_out: port@1 {
reg = <1>;
};
};
};
hdmi: hdmi@27da0000 {
compatible = "rockchip,rk3576-dw-hdmi-qp";
reg = <0x0 0x27da0000 0x0 0x20000>;
@ -1793,6 +1971,30 @@ gpu_leakage: gpu-leakage@21 {
log_leakage: log-leakage@22 {
reg = <0x22 0x1>;
};
bigcore_tsadc_trim: bigcore-tsadc-trim@24 {
reg = <0x24 0x2>;
bits = <0 10>;
};
litcore_tsadc_trim: litcore-tsadc-trim@26 {
reg = <0x26 0x2>;
bits = <0 10>;
};
ddr_tsadc_trim: ddr-tsadc-trim@28 {
reg = <0x28 0x2>;
bits = <0 10>;
};
npu_tsadc_trim: npu-tsadc-trim@2a {
reg = <0x2a 0x2>;
bits = <0 10>;
};
gpu_tsadc_trim: gpu-tsadc-trim@2c {
reg = <0x2c 0x2>;
bits = <0 10>;
};
soc_tsadc_trim: soc-tsadc-trim@64 {
reg = <0x64 0x2>;
bits = <0 10>;
};
};
sai0: sai@2a600000 {
@ -2073,7 +2275,6 @@ wdt: watchdog@2ace0000 {
clocks = <&cru TCLK_WDT0>, <&cru PCLK_WDT0>;
clock-names = "tclk", "pclk";
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
spi0: spi@2acf0000 {
@ -2303,6 +2504,55 @@ saradc: adc@2ae00000 {
status = "disabled";
};
tsadc: tsadc@2ae70000 {
compatible = "rockchip,rk3576-tsadc";
reg = <0x0 0x2ae70000 0x0 0x400>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru CLK_TSADC>, <&cru PCLK_TSADC>;
clock-names = "tsadc", "apb_pclk";
assigned-clocks = <&cru CLK_TSADC>;
assigned-clock-rates = <2000000>;
resets = <&cru SRST_P_TSADC>, <&cru SRST_TSADC>;
reset-names = "tsadc-apb", "tsadc";
#thermal-sensor-cells = <1>;
rockchip,hw-tshut-temp = <120000>;
rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
#address-cells = <1>;
#size-cells = <0>;
sensor@0 {
reg = <0>;
nvmem-cells = <&soc_tsadc_trim>;
nvmem-cell-names = "trim";
};
sensor@1 {
reg = <1>;
nvmem-cells = <&bigcore_tsadc_trim>;
nvmem-cell-names = "trim";
};
sensor@2 {
reg = <2>;
nvmem-cells = <&litcore_tsadc_trim>;
nvmem-cell-names = "trim";
};
sensor@3 {
reg = <3>;
nvmem-cells = <&ddr_tsadc_trim>;
nvmem-cell-names = "trim";
};
sensor@4 {
reg = <4>;
nvmem-cells = <&npu_tsadc_trim>;
nvmem-cell-names = "trim";
};
sensor@5 {
reg = <5>;
nvmem-cells = <&gpu_tsadc_trim>;
nvmem-cell-names = "trim";
};
};
i2c9: i2c@2ae80000 {
compatible = "rockchip,rk3576-i2c", "rockchip,rk3399-i2c";
reg = <0x0 0x2ae80000 0x0 0x1000>;
@ -2346,6 +2596,22 @@ uart11: serial@2afd0000 {
status = "disabled";
};
mipidcphy: phy@2b020000 {
compatible = "rockchip,rk3576-mipi-dcphy";
reg = <0x0 0x2b020000 0x0 0x10000>;
clocks = <&cru PCLK_MIPI_DCPHY>,
<&cru CLK_PHY_REF_SRC>;
clock-names = "pclk", "ref";
resets = <&cru SRST_M_MIPI_DCPHY>,
<&cru SRST_P_MIPI_DCPHY>,
<&cru SRST_P_DCPHY_GRF>,
<&cru SRST_S_MIPI_DCPHY>;
reset-names = "m_phy", "apb", "grf", "s_phy";
rockchip,grf = <&mipidcphy_grf>;
#phy-cells = <1>;
status = "disabled";
};
combphy0_ps: phy@2b050000 {
compatible = "rockchip,rk3576-naneng-combphy";
reg = <0x0 0x2b050000 0x0 0x100>;

View File

@ -71,7 +71,7 @@ leds-1 {
led-1 {
color = <LED_COLOR_ID_GREEN>;
default-state = "on";
default-state = "off";
function = LED_FUNCTION_LAN;
linux,default-trigger = "netdev";
pwms = <&pwm14 0 1000000 PWM_POLARITY_INVERTED>;
@ -80,7 +80,7 @@ led-1 {
led-2 {
color = <LED_COLOR_ID_GREEN>;
default-state = "on";
default-state = "off";
function = LED_FUNCTION_WAN;
linux,default-trigger = "netdev";
pwms = <&pwm11 0 1000000 PWM_POLARITY_INVERTED>;

View File

@ -841,7 +841,7 @@ power: power-controller {
status = "okay";
/* These power domains are grouped by VD_NPU */
power-domain@RK3588_PD_NPU {
pd_npu: power-domain@RK3588_PD_NPU {
reg = <RK3588_PD_NPU>;
#power-domain-cells = <0>;
#address-cells = <1>;
@ -1140,6 +1140,97 @@ power-domain@RK3588_PD_SDMMC {
};
};
rknn_core_0: npu@fdab0000 {
compatible = "rockchip,rk3588-rknn-core";
reg = <0x0 0xfdab0000 0x0 0x1000>,
<0x0 0xfdab1000 0x0 0x1000>,
<0x0 0xfdab3000 0x0 0x1000>;
reg-names = "pc", "cna", "core";
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru ACLK_NPU0>, <&cru HCLK_NPU0>,
<&scmi_clk SCMI_CLK_NPU>, <&cru PCLK_NPU_ROOT>;
clock-names = "aclk", "hclk", "npu", "pclk";
assigned-clocks = <&scmi_clk SCMI_CLK_NPU>;
assigned-clock-rates = <200000000>;
resets = <&cru SRST_A_RKNN0>, <&cru SRST_H_RKNN0>;
reset-names = "srst_a", "srst_h";
power-domains = <&power RK3588_PD_NPUTOP>;
iommus = <&rknn_mmu_0>;
status = "disabled";
};
rknn_mmu_0: iommu@fdab9000 {
compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
reg = <0x0 0xfdab9000 0x0 0x100>,
<0x0 0xfdaba000 0x0 0x100>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru ACLK_NPU0>, <&cru HCLK_NPU0>;
clock-names = "aclk", "iface";
#iommu-cells = <0>;
power-domains = <&power RK3588_PD_NPUTOP>;
status = "disabled";
};
rknn_core_1: npu@fdac0000 {
compatible = "rockchip,rk3588-rknn-core";
reg = <0x0 0xfdac0000 0x0 0x1000>,
<0x0 0xfdac1000 0x0 0x1000>,
<0x0 0xfdac3000 0x0 0x1000>;
reg-names = "pc", "cna", "core";
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru ACLK_NPU1>, <&cru HCLK_NPU1>,
<&scmi_clk SCMI_CLK_NPU>, <&cru PCLK_NPU_ROOT>;
clock-names = "aclk", "hclk", "npu", "pclk";
assigned-clocks = <&scmi_clk SCMI_CLK_NPU>;
assigned-clock-rates = <200000000>;
resets = <&cru SRST_A_RKNN1>, <&cru SRST_H_RKNN1>;
reset-names = "srst_a", "srst_h";
power-domains = <&power RK3588_PD_NPU1>;
iommus = <&rknn_mmu_1>;
status = "disabled";
};
rknn_mmu_1: iommu@fdac9000 {
compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
reg = <0x0 0xfdaca000 0x0 0x100>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru ACLK_NPU1>, <&cru HCLK_NPU1>;
clock-names = "aclk", "iface";
#iommu-cells = <0>;
power-domains = <&power RK3588_PD_NPU1>;
status = "disabled";
};
rknn_core_2: npu@fdad0000 {
compatible = "rockchip,rk3588-rknn-core";
reg = <0x0 0xfdad0000 0x0 0x1000>,
<0x0 0xfdad1000 0x0 0x1000>,
<0x0 0xfdad3000 0x0 0x1000>;
reg-names = "pc", "cna", "core";
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru ACLK_NPU2>, <&cru HCLK_NPU2>,
<&scmi_clk SCMI_CLK_NPU>, <&cru PCLK_NPU_ROOT>;
clock-names = "aclk", "hclk", "npu", "pclk";
assigned-clocks = <&scmi_clk SCMI_CLK_NPU>;
assigned-clock-rates = <200000000>;
resets = <&cru SRST_A_RKNN2>, <&cru SRST_H_RKNN2>;
reset-names = "srst_a", "srst_h";
power-domains = <&power RK3588_PD_NPU2>;
iommus = <&rknn_mmu_2>;
status = "disabled";
};
rknn_mmu_2: iommu@fdad9000 {
compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
reg = <0x0 0xfdada000 0x0 0x100>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru ACLK_NPU2>, <&cru HCLK_NPU2>;
clock-names = "aclk", "iface";
#iommu-cells = <0>;
power-domains = <&power RK3588_PD_NPU2>;
status = "disabled";
};
vpu121: video-codec@fdb50000 {
compatible = "rockchip,rk3588-vpu121", "rockchip,rk3568-vpu";
reg = <0x0 0xfdb50000 0x0 0x800>;
@ -1472,6 +1563,36 @@ dsi1_out: port@1 {
};
};
dp0: dp@fde50000 {
compatible = "rockchip,rk3588-dp";
reg = <0x0 0xfde50000 0x0 0x4000>;
interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH 0>;
assigned-clocks = <&cru CLK_AUX16M_0>;
assigned-clock-rates = <16000000>;
clocks = <&cru PCLK_DP0>, <&cru CLK_AUX16M_0>,
<&cru CLK_DP0>, <&cru MCLK_I2S4_8CH_TX>,
<&cru MCLK_SPDIF2_DP0>;
clock-names = "apb", "aux", "hdcp", "i2s", "spdif";
phys = <&usbdp_phy0 PHY_TYPE_DP>;
power-domains = <&power RK3588_PD_VO0>;
resets = <&cru SRST_DP0>;
#sound-dai-cells = <0>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
dp0_in: port@0 {
reg = <0>;
};
dp0_out: port@1 {
reg = <1>;
};
};
};
hdmi0: hdmi@fde80000 {
compatible = "rockchip,rk3588-dw-hdmi-qp";
reg = <0x0 0xfde80000 0x0 0x20000>;

View File

@ -210,6 +210,36 @@ i2s10_8ch: i2s@fde00000 {
status = "disabled";
};
dp1: dp@fde60000 {
compatible = "rockchip,rk3588-dp";
reg = <0x0 0xfde60000 0x0 0x4000>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH 0>;
assigned-clocks = <&cru CLK_AUX16M_1>;
assigned-clock-rates = <16000000>;
clocks = <&cru PCLK_DP1>, <&cru CLK_AUX16M_1>,
<&cru CLK_DP1>, <&cru MCLK_I2S8_8CH_TX>,
<&cru MCLK_SPDIF5_DP1>;
clock-names = "apb", "aux", "hdcp", "i2s", "spdif";
phys = <&usbdp_phy1 PHY_TYPE_DP>;
power-domains = <&power RK3588_PD_VO0>;
resets = <&cru SRST_DP1>;
#sound-dai-cells = <0>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
dp1_in: port@0 {
reg = <0>;
};
dp1_out: port@1 {
reg = <1>;
};
};
};
hdmi1: hdmi@fdea0000 {
compatible = "rockchip,rk3588-dw-hdmi-qp";
reg = <0x0 0xfdea0000 0x0 0x20000>;

View File

@ -160,6 +160,17 @@ &hdmi1_sound {
status = "okay";
};
&hdmi_receiver_cma {
status = "okay";
};
&hdmi_receiver {
hpd-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>;
pinctrl-names = "default";
status = "okay";
};
&hdptxphy0 {
status = "okay";
};
@ -279,6 +290,12 @@ blue_led_pin: blue-led {
};
};
hdmirx {
hdmirx_hpd: hdmirx-5v-detection {
rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
ir-receiver {
ir_receiver_pin: ir-receiver-pin {
rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;

View File

@ -258,6 +258,28 @@ regulator-state-mem {
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1m2_xfer>;
status = "okay";
vdd_npu_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_npu_s0";
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c6 {
clock-frequency = <400000>;
status = "okay";
@ -352,6 +374,40 @@ &pd_gpu {
domain-supply = <&vdd_gpu_s0>;
};
&pd_npu {
domain-supply = <&vdd_npu_s0>;
};
&rknn_core_0 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknn_core_1 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknn_core_2 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknn_mmu_0 {
status = "okay";
};
&rknn_mmu_1 {
status = "okay";
};
&rknn_mmu_2 {
status = "okay";
};
&saradc {
vref-supply = <&vcc_1v8_s0>;
status = "okay";

View File

@ -415,6 +415,36 @@ &pcie3x4 {
status = "okay";
};
&rknn_core_0 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_mem_s0>;
status = "okay";
};
&rknn_core_1 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_mem_s0>;
status = "okay";
};
&rknn_core_2 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_mem_s0>;
status = "okay";
};
&rknn_mmu_0 {
status = "okay";
};
&rknn_mmu_1 {
status = "okay";
};
&rknn_mmu_2 {
status = "okay";
};
&saradc {
vref-supply = <&vcc_1v8_s0>;
status = "okay";

View File

@ -57,6 +57,31 @@ analog-sound {
"Headphone", "Headphones";
};
bridge {
compatible = "radxa,ra620";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
hdmi_bridge_in: endpoint {
remote-endpoint = <&dp1_out_con>;
};
};
port@1 {
reg = <1>;
hdmi_bridge_out: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@ -73,6 +98,17 @@ hdd-led2 {
};
};
hdmi0-con {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_bridge_out>;
};
};
};
hdmi1-con {
compatible = "hdmi-connector";
type = "a";
@ -268,6 +304,24 @@ &cpu_l3 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&dp1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&dp1m0_pins>;
};
&dp1_in {
dp1_in_vp2: endpoint {
remote-endpoint = <&vp2_out_dp1>;
};
};
&dp1_out {
dp1_out_con: endpoint {
remote-endpoint = <&hdmi_bridge_in>;
};
};
&gpu {
mali-supply = <&vdd_gpu_s0>;
status = "okay";
@ -1261,3 +1315,10 @@ vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {
remote-endpoint = <&hdmi1_in_vp1>;
};
};
&vp2 {
vp2_out_dp1: endpoint@b {
reg = <ROCKCHIP_VOP2_EP_DP1>;
remote-endpoint = <&dp1_in_vp2>;
};
};

View File

@ -5,6 +5,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/soc/rockchip,vop2.h>
#include <dt-bindings/usb/pd.h>
#include "rk3588.dtsi"
/ {
@ -55,6 +56,18 @@ rfkill-bt {
shutdown-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
};
vbus5v0_typec: vbus5v0-typec {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vbus5v0_typec_en>;
regulator-name = "vbus5v0_typec";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {
compatible = "regulator-fixed";
enable-active-high;
@ -268,6 +281,99 @@ regulator-state-mem {
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1m2_xfer>;
status = "okay";
vdd_npu_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_npu_s0";
regulator-boot-on;
regulator-enable-ramp-delay = <500>;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c4 {
pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>;
status = "okay";
usbc0: usb-typec@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&usbc0_int>;
vbus-supply = <&vbus5v0_typec>;
/*
* When the board is starting to send power-delivery messages
* too late (5 seconds according to the specification), the
* power-supply reacts with a hard-reset. That removes the
* power from VBUS for some time, which resets te whole board.
*/
status = "fail";
usb_con: connector {
compatible = "usb-c-connector";
label = "USB-C";
data-role = "dual";
/* fusb302 supports PD Rev 2.0 Ver 1.2 */
pd-revision = /bits/ 8 <0x2 0x0 0x1 0x2>;
power-role = "sink";
try-power-role = "sink";
op-sink-microwatt = <1000000>;
sink-pdos =
<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>,
<PDO_VAR(5000, 20000, 5000)>;
altmodes {
displayport {
svid = /bits/ 16 <0xff01>;
vdo = <0xffffffff>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usbc0_hs: endpoint {
remote-endpoint = <&usb_host0_xhci_to_usbc0>;
};
};
port@1 {
reg = <1>;
usbc0_ss: endpoint {
remote-endpoint = <&usbdp_phy0_ss>;
};
};
port@2 {
reg = <2>;
usbc0_sbu: endpoint {
remote-endpoint = <&usbdp_phy0_sbu>;
};
};
};
};
};
};
&i2c6 {
status = "okay";
@ -392,6 +498,10 @@ &pd_gpu {
domain-supply = <&vdd_gpu_s0>;
};
&pd_npu {
domain-supply = <&vdd_npu_s0>;
};
&pinctrl {
hym8563 {
hym8563_int: hym8563-int {
@ -418,12 +528,52 @@ pcie3_vcc3v3_en: pcie3-vcc3v3-en {
rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
usbc0_int: usbc0-int {
rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
vbus5v0_typec_en: vbus5v0-typec-en {
rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pwm1 {
status = "okay";
};
&rknn_core_0 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknn_core_1 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknn_core_2 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknn_mmu_0 {
status = "okay";
};
&rknn_mmu_1 {
status = "okay";
};
&rknn_mmu_2 {
status = "okay";
};
&saradc {
vref-supply = <&avcc_1v8_s0>;
status = "okay";
@ -803,6 +953,14 @@ &uart2 {
status = "okay";
};
&u2phy0 {
status = "okay";
};
&u2phy0_otg {
status = "okay";
};
&u2phy1 {
status = "okay";
};
@ -830,6 +988,27 @@ &u2phy3_host {
status = "okay";
};
&usbdp_phy0 {
mode-switch;
orientation-switch;
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
usbdp_phy0_ss: endpoint@0 {
reg = <0>;
remote-endpoint = <&usbc0_ss>;
};
usbdp_phy0_sbu: endpoint@1 {
reg = <1>;
remote-endpoint = <&usbc0_sbu>;
};
};
};
&usbdp_phy1 {
status = "okay";
};
@ -842,6 +1021,17 @@ &usb_host0_ohci {
status = "okay";
};
&usb_host0_xhci {
usb-role-switch;
status = "okay";
port {
usb_host0_xhci_to_usbc0: endpoint {
remote-endpoint = <&usbc0_hs>;
};
};
};
&usb_host1_ehci {
status = "okay";
};

View File

@ -99,12 +99,24 @@ pcie3x2_rst: pcie3x2-rst {
};
usb {
usbc_sbu_dc: usbc-sbu-dc {
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
<0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&usbdp_phy0 {
pinctrl-names = "default";
pinctrl-0 = <&usbc_sbu_dc>;
sbu1-dc-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
sbu2-dc-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
};
&vcc5v0_host {
enable-active-high;
gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;

View File

@ -38,12 +38,24 @@ &uart6 {
&pinctrl {
usb {
usbc_sbu_dc: usbc-sbu-dc {
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
<4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&usbdp_phy0 {
pinctrl-names = "default";
pinctrl-0 = <&usbc_sbu_dc>;
sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
};
&vcc5v0_host {
enable-active-high;
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;

View File

@ -95,6 +95,20 @@ hp_detect: hp-detect {
rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
usbc_sbu_dc: usbc-sbu-dc {
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
<0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&usbdp_phy0 {
pinctrl-names = "default";
pinctrl-0 = <&usbc_sbu_dc>;
sbu1-dc-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
sbu2-dc-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
};
&vcc3v3_pcie2x1l0 {

View File

@ -39,6 +39,18 @@ chosen {
stdout-path = "serial2:1500000n8";
};
dp-con {
compatible = "dp-connector";
label = "DP OUT";
type = "mini";
port {
dp_con_in: endpoint {
remote-endpoint = <&dp0_out_con>;
};
};
};
hdmi-con {
compatible = "hdmi-connector";
type = "d";
@ -215,6 +227,24 @@ &cpu_b2 {
cpu-supply = <&vdd_cpu_big1_s0>;
};
&dp0 {
pinctrl-0 = <&dp0m0_pins>;
pinctrl-names = "default";
status = "okay";
};
&dp0_in {
dp0_in_vp2: endpoint {
remote-endpoint = <&vp2_out_dp0>;
};
};
&dp0_out {
dp0_out_con: endpoint {
remote-endpoint = <&dp_con_in>;
};
};
&gpu {
mali-supply = <&vdd_gpu_s0>;
status = "okay";
@ -890,3 +920,10 @@ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
remote-endpoint = <&hdmi0_in_vp0>;
};
};
&vp2 {
vp2_out_dp0: endpoint@a {
reg = <ROCKCHIP_VOP2_EP_DP0>;
remote-endpoint = <&dp0_in_vp2>;
};
};

View File

@ -251,6 +251,10 @@ hdmi0_out_con: endpoint {
};
};
&hdmi0_sound {
status = "okay";
};
&hdptxphy0 {
status = "okay";
};
@ -335,6 +339,10 @@ hym8563: rtc@51 {
};
};
&i2s5_8ch {
status = "okay";
};
&mdio1 {
rgmii_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-id001c.c916";
@ -363,6 +371,10 @@ &pd_gpu {
domain-supply = <&vdd_gpu_s0>;
};
&pd_npu {
domain-supply = <&vdd_npu_s0>;
};
&pinctrl {
gpio-key {
key1_pin: key1-pin {
@ -421,6 +433,36 @@ rtl8211f_rst: rtl8211f-rst {
};
};
&rknn_core_0 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknn_core_1 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknn_core_2 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknn_mmu_0 {
status = "okay";
};
&rknn_mmu_1 {
status = "okay";
};
&rknn_mmu_2 {
status = "okay";
};
&saradc {
vref-supply = <&avcc_1v8_s0>;
status = "okay";

View File

@ -377,6 +377,10 @@ &pd_gpu {
domain-supply = <&vdd_gpu_s0>;
};
&pd_npu {
domain-supply = <&vdd_npu_s0>;
};
&pinctrl {
hym8563 {
hym8563_int: hym8563-int {
@ -407,6 +411,36 @@ &pwm0 {
status = "okay";
};
&rknn_core_0 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknn_core_1 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknn_core_2 {
npu-supply = <&vdd_npu_s0>;
sram-supply = <&vdd_npu_s0>;
status = "okay";
};
&rknn_mmu_0 {
status = "okay";
};
&rknn_mmu_1 {
status = "okay";
};
&rknn_mmu_2 {
status = "okay";
};
&saradc {
vref-supply = <&avcc_1v8_s0>;
status = "okay";

View File

@ -58,6 +58,13 @@ io-led {
gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
power-led {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_POWER;
gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
};
fan: pwm-fan {