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octeontx2-af: npc: cn20k: debugfs enhancements
Improve MCAM visibility and field debugging for CN20K NPC. - Extend "mcam_layout" to show enabled (+) or disabled state per entry so status can be verified without parsing the full "mcam_entry" dump. - Add "dstats" debugfs entry: for enabled MCAM indices, print hit deltas since the prior read by comparing hardware counters to a per-entry software baseline and advancing that baseline after each read (hardware counters are not cleared). - Add "mismatch" debugfs entry: lists MCAM entries that are enabled but not explicitly allocated, helping diagnose allocation/field issues. Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com> Link: https://patch.msgid.link/20260609040453.711932-3-rkannoth@marvell.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Ratheesh Kannoth
Jakub Kicinski
parent
6056a11b8d
commit
4655902dee
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@ -13,6 +13,7 @@
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#include "struct.h"
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#include "rvu.h"
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#include "debugfs.h"
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#include "cn20k/reg.h"
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#include "cn20k/npc.h"
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static int npc_mcam_layout_show(struct seq_file *s, void *unused)
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@ -58,7 +59,8 @@ static int npc_mcam_layout_show(struct seq_file *s, void *unused)
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"v:%u", vidx0);
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}
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seq_printf(s, "\t%u(%#x) %s\n", idx0, pf1,
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seq_printf(s, "\t%u(%#x)%c %s\n", idx0, pf1,
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test_bit(idx0, npc_priv->en_map) ? '+' : ' ',
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map ? buf0 : " ");
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}
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goto next;
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@ -101,9 +103,13 @@ static int npc_mcam_layout_show(struct seq_file *s, void *unused)
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vidx1);
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}
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seq_printf(s, "%05u(%#x) %s\t\t%05u(%#x) %s\n",
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idx1, pf2, v1 ? buf1 : " ",
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idx0, pf1, v0 ? buf0 : " ");
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seq_printf(s, "%05u(%#x)%c %s\t\t%05u(%#x)%c %s\n",
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idx1, pf2,
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test_bit(idx1, npc_priv->en_map) ? '+' : ' ',
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v1 ? buf1 : " ",
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idx0, pf1,
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test_bit(idx0, npc_priv->en_map) ? '+' : ' ',
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v0 ? buf0 : " ");
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continue;
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}
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@ -120,8 +126,9 @@ static int npc_mcam_layout_show(struct seq_file *s, void *unused)
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vidx0);
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}
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seq_printf(s, "\t\t \t\t%05u(%#x) %s\n", idx0,
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pf1, map ? buf0 : " ");
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seq_printf(s, "\t\t \t\t%05u(%#x)%c %s\n", idx0, pf1,
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test_bit(idx0, npc_priv->en_map) ? '+' : ' ',
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map ? buf0 : " ");
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continue;
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}
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@ -134,7 +141,8 @@ static int npc_mcam_layout_show(struct seq_file *s, void *unused)
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snprintf(buf1, sizeof(buf1), "v:%05u", vidx1);
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}
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seq_printf(s, "%05u(%#x) %s\n", idx1, pf1,
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seq_printf(s, "%05u(%#x)%c %s\n", idx1, pf1,
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test_bit(idx1, npc_priv->en_map) ? '+' : ' ',
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map ? buf1 : " ");
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}
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next:
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@ -145,6 +153,136 @@ static int npc_mcam_layout_show(struct seq_file *s, void *unused)
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DEFINE_SHOW_ATTRIBUTE(npc_mcam_layout);
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#define __OCTEONTX2_DEBUGFS_ATTRIBUTE_FOPS(__name) \
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static const struct file_operations __name ## _fops = { \
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.owner = THIS_MODULE, \
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.open = __name ## _open, \
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.read = seq_read, \
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.llseek = seq_lseek, \
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.release = single_release, \
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}
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#define DEFINE_OCTEONTX2_DEBUGFS_ATTRIBUTE_WITH_SIZE(__name, __size) \
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static int __name ## _open(struct inode *inode, struct file *file) \
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{ \
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return single_open_size(file, __name ## _show, inode->i_private, \
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__size); \
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} \
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__OCTEONTX2_DEBUGFS_ATTRIBUTE_FOPS(__name)
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static DEFINE_MUTEX(stats_lock);
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/* MAX_NUM_BANKS, MAX_SUBBANK_DEPTH and MAX_NUM_SUB_BANKS represent
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* hard limit on all silicon variants, preventing any possibility of
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* out-of-bounds access.
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*/
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static u64 dstats[MAX_NUM_BANKS][MAX_SUBBANK_DEPTH * MAX_NUM_SUB_BANKS] = {};
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static int npc_mcam_dstats_show(struct seq_file *s, void *unused)
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{
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struct npc_priv_t *npc_priv;
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int blkaddr, pf, mcam_idx;
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u64 stats, delta;
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struct rvu *rvu;
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char buff[64];
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u8 key_type;
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void *map;
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npc_priv = npc_priv_get();
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rvu = s->private;
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blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
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if (blkaddr < 0)
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return 0;
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mutex_lock(&stats_lock);
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seq_puts(s, "idx\tpfunc\tstats\n");
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for (int bank = npc_priv->num_banks - 1; bank >= 0; bank--) {
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for (int idx = npc_priv->bank_depth - 1; idx >= 0; idx--) {
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mcam_idx = bank * npc_priv->bank_depth + idx;
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if (npc_mcam_idx_2_key_type(rvu, mcam_idx, &key_type))
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continue;
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if (key_type == NPC_MCAM_KEY_X4 && bank != 0)
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continue;
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if (!test_bit(mcam_idx, npc_priv->en_map))
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continue;
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stats = rvu_read64(rvu, blkaddr,
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NPC_AF_CN20K_MCAMEX_BANKX_STAT_EXT(idx, bank));
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if (!stats)
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continue;
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if (stats == dstats[bank][idx])
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continue;
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if (stats < dstats[bank][idx])
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dstats[bank][idx] = 0;
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pf = 0xFFFF;
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map = xa_load(&npc_priv->xa_idx2pf_map, mcam_idx);
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if (map)
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pf = xa_to_value(map);
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delta = stats - dstats[bank][idx];
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snprintf(buff, sizeof(buff), "%u\t%#04x\t%llu\n",
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mcam_idx, pf, delta);
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seq_puts(s, buff);
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dstats[bank][idx] = stats;
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}
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}
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mutex_unlock(&stats_lock);
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return 0;
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}
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/* "%u\t%#04x\t%llu\n" needs less than 64 characters to print */
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#define TOTAL_SZ (MAX_NUM_BANKS * MAX_NUM_SUB_BANKS * MAX_SUBBANK_DEPTH * 64)
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DEFINE_OCTEONTX2_DEBUGFS_ATTRIBUTE_WITH_SIZE(npc_mcam_dstats, TOTAL_SZ);
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static int npc_mcam_mismatch_show(struct seq_file *s, void *unused)
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{
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struct npc_priv_t *npc_priv;
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struct npc_subbank *sb;
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int mcam_idx, sb_off;
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struct rvu *rvu;
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char buff[64];
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void *map;
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int rc;
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npc_priv = npc_priv_get();
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rvu = s->private;
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seq_puts(s, "index\tsb idx\tkw type\n");
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for (int bank = npc_priv->num_banks - 1; bank >= 0; bank--) {
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for (int idx = npc_priv->bank_depth - 1; idx >= 0; idx--) {
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mcam_idx = bank * npc_priv->bank_depth + idx;
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if (!test_bit(mcam_idx, npc_priv->en_map))
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continue;
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map = xa_load(&npc_priv->xa_idx2pf_map, mcam_idx);
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if (map)
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continue;
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rc = npc_mcam_idx_2_subbank_idx(rvu, mcam_idx,
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&sb, &sb_off);
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if (rc)
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continue;
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snprintf(buff, sizeof(buff), "%u\t%d\t%u\n",
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mcam_idx, sb->idx, sb->key_type);
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seq_puts(s, buff);
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}
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}
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return 0;
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}
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/* "%u\t%d\t%u\n" needs less than 64 characters to print. */
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DEFINE_OCTEONTX2_DEBUGFS_ATTRIBUTE_WITH_SIZE(npc_mcam_mismatch, TOTAL_SZ);
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static int npc_mcam_default_show(struct seq_file *s, void *unused)
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{
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struct npc_priv_t *npc_priv;
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@ -259,6 +397,12 @@ int npc_cn20k_debugfs_init(struct rvu *rvu)
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debugfs_create_file("vidx2idx", 0444, rvu->rvu_dbg.npc,
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npc_priv, &npc_vidx2idx_map_fops);
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debugfs_create_file("dstats", 0444, rvu->rvu_dbg.npc, rvu,
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&npc_mcam_dstats_fops);
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debugfs_create_file("mismatch", 0444, rvu->rvu_dbg.npc, rvu,
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&npc_mcam_mismatch_fops);
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debugfs_create_file("idx2vidx", 0444, rvu->rvu_dbg.npc,
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npc_priv, &npc_idx2vidx_map_fops);
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@ -824,7 +824,7 @@ npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr,
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rvu_write64(rvu, blkaddr,
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NPC_AF_CN20K_MCAMEX_BANKX_CFG_EXT(mcam_idx, bank),
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cfg);
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return 0;
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goto update_en_map;
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}
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/* For NPC_CN20K_MCAM_KEY_X4 keys, both the banks
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@ -842,6 +842,12 @@ npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr,
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cfg);
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}
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update_en_map:
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if (enable)
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set_bit(index, npc_priv.en_map);
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else
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clear_bit(index, npc_priv.en_map);
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return 0;
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}
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@ -1785,9 +1791,9 @@ static int npc_subbank_idx_2_mcam_idx(struct rvu *rvu, struct npc_subbank *sb,
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return 0;
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}
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static int npc_mcam_idx_2_subbank_idx(struct rvu *rvu, u16 mcam_idx,
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struct npc_subbank **sb,
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int *sb_off)
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int npc_mcam_idx_2_subbank_idx(struct rvu *rvu, u16 mcam_idx,
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struct npc_subbank **sb,
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int *sb_off)
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{
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int bank_off, sb_id;
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@ -4494,11 +4500,17 @@ static int npc_priv_init(struct rvu *rvu)
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npc_const2 = rvu_read64(rvu, blkaddr, NPC_AF_CONST2);
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num_banks = mcam->banks;
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bank_depth = mcam->banksize;
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if (!num_banks || num_banks > MAX_NUM_BANKS) {
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dev_err(rvu->dev,
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"Number of banks(%u) is invalid\n", num_banks);
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return -EINVAL;
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}
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num_subbanks = FIELD_GET(GENMASK_ULL(39, 32), npc_const2);
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if (!num_subbanks) {
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dev_err(rvu->dev, "Number of subbanks is zero\n");
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if (!num_subbanks || num_subbanks > MAX_NUM_SUB_BANKS) {
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dev_err(rvu->dev,
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"Number of subbanks is invalid %u\n",
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num_subbanks);
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return -EFAULT;
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}
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@ -4509,10 +4521,23 @@ static int npc_priv_init(struct rvu *rvu)
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return -EINVAL;
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}
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npc_priv.num_subbanks = num_subbanks;
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bank_depth = mcam->banksize;
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if (!bank_depth || bank_depth % num_subbanks) {
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dev_err(rvu->dev,
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"Bank depth(%u) should be a multiple of num_subbanks(%u)\n",
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bank_depth, num_subbanks);
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return -EINVAL;
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}
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subbank_depth = bank_depth / num_subbanks;
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if (!subbank_depth || subbank_depth > MAX_SUBBANK_DEPTH) {
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dev_err(rvu->dev,
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"Invalid subbank depth %u\n",
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subbank_depth);
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return -EINVAL;
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}
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npc_priv.num_subbanks = num_subbanks;
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npc_priv.bank_depth = bank_depth;
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npc_priv.subbank_depth = subbank_depth;
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@ -4601,6 +4626,8 @@ void npc_cn20k_deinit(struct rvu *rvu)
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*/
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kfree(npc_priv.sb);
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kfree(subbank_srch_order);
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bitmap_clear(npc_priv.en_map, 0, MAX_NUM_BANKS * MAX_NUM_SUB_BANKS *
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MAX_SUBBANK_DEPTH);
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}
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static int npc_setup_mcam_section(struct rvu *rvu, int key_type)
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@ -10,6 +10,10 @@
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#define MKEX_CN20K_SIGN 0x19bbfdbd160
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/* MAX_NUM_BANKS, MAX_SUBBANK_DEPTH and MAX_NUM_SUB_BANKS represent
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* hard limit on all silicon variants, preventing any possibility of
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* out-of-bounds access on matrix defined using these values.
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*/
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#define MAX_NUM_BANKS 2
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#define MAX_NUM_SUB_BANKS 32
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#define MAX_SUBBANK_DEPTH 256
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@ -170,6 +174,7 @@ struct npc_defrag_show_node {
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* @num_banks: Number of banks.
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* @num_subbanks: Number of subbanks.
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* @subbank_depth: Depth of subbank.
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* @en_map: Enable/disable status.
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* @kw: Kex configured key type.
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* @sb: Subbank array.
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* @xa_sb_used: Array of used subbanks.
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@ -193,6 +198,9 @@ struct npc_priv_t {
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const int num_banks;
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int num_subbanks;
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int subbank_depth;
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DECLARE_BITMAP(en_map, MAX_NUM_BANKS *
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MAX_NUM_SUB_BANKS *
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MAX_SUBBANK_DEPTH);
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u8 kw;
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struct npc_subbank *sb;
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struct xarray xa_sb_used;
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@ -336,5 +344,8 @@ u16 npc_cn20k_vidx2idx(u16 index);
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u16 npc_cn20k_idx2vidx(u16 idx);
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int npc_cn20k_defrag(struct rvu *rvu);
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bool npc_is_cgx_or_lbk(struct rvu *rvu, u16 pcifunc);
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int npc_mcam_idx_2_subbank_idx(struct rvu *rvu, u16 mcam_idx,
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struct npc_subbank **sb,
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int *sb_off);
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#endif /* NPC_CN20K_H */
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