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staging: kpc2000: replace white spaces with tabs for kpc2000_spi.c
There are multiple wrong formats in kpc2000_spi.c, is time to do clean work for it. Signed-off-by: Mao Wenan <maowenan@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mao Wenan
Greg Kroah-Hartman
parent
9164f33631
commit
46144c1391
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@ -113,59 +113,59 @@ struct kp_spi {
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struct kp_spi_controller_state {
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void __iomem *base;
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unsigned long phys;
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unsigned char chip_select;
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int word_len;
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s64 conf_cache;
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void __iomem *base;
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unsigned long phys;
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unsigned char chip_select;
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int word_len;
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s64 conf_cache;
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};
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union kp_spi_config {
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/* use this to access individual elements */
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struct __attribute__((packed)) spi_config_bitfield {
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unsigned int pha : 1; /* spim_clk Phase */
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unsigned int pol : 1; /* spim_clk Polarity */
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unsigned int epol : 1; /* spim_csx Polarity */
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unsigned int dpe : 1; /* Transmission Enable */
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unsigned int wl : 5; /* Word Length */
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unsigned int : 3;
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unsigned int trm : 2; /* TxRx Mode */
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unsigned int cs : 4; /* Chip Select */
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unsigned int wcnt : 7; /* Word Count */
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unsigned int ffen : 1; /* FIFO Enable */
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unsigned int spi_en : 1; /* SPI Enable */
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unsigned int : 5;
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} bitfield;
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/* use this to grab the whole register */
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u32 reg;
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/* use this to access individual elements */
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struct __attribute__((packed)) spi_config_bitfield {
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unsigned int pha : 1; /* spim_clk Phase */
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unsigned int pol : 1; /* spim_clk Polarity */
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unsigned int epol : 1; /* spim_csx Polarity */
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unsigned int dpe : 1; /* Transmission Enable */
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unsigned int wl : 5; /* Word Length */
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unsigned int : 3;
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unsigned int trm : 2; /* TxRx Mode */
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unsigned int cs : 4; /* Chip Select */
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unsigned int wcnt : 7; /* Word Count */
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unsigned int ffen : 1; /* FIFO Enable */
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unsigned int spi_en : 1; /* SPI Enable */
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unsigned int : 5;
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} bitfield;
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/* use this to grab the whole register */
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u32 reg;
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};
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union kp_spi_status {
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struct __attribute__((packed)) spi_status_bitfield {
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unsigned int rx : 1; /* Rx Status */
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unsigned int tx : 1; /* Tx Status */
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unsigned int eo : 1; /* End of Transfer */
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unsigned int : 1;
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unsigned int txffe : 1; /* Tx FIFO Empty */
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unsigned int txfff : 1; /* Tx FIFO Full */
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unsigned int rxffe : 1; /* Rx FIFO Empty */
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unsigned int rxfff : 1; /* Rx FIFO Full */
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unsigned int : 24;
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} bitfield;
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u32 reg;
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struct __attribute__((packed)) spi_status_bitfield {
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unsigned int rx : 1; /* Rx Status */
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unsigned int tx : 1; /* Tx Status */
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unsigned int eo : 1; /* End of Transfer */
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unsigned int : 1;
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unsigned int txffe : 1; /* Tx FIFO Empty */
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unsigned int txfff : 1; /* Tx FIFO Full */
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unsigned int rxffe : 1; /* Rx FIFO Empty */
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unsigned int rxfff : 1; /* Rx FIFO Full */
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unsigned int : 24;
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} bitfield;
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u32 reg;
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};
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union kp_spi_ffctrl {
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struct __attribute__((packed)) spi_ffctrl_bitfield {
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unsigned int ffstart : 1; /* FIFO Start */
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unsigned int : 31;
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} bitfield;
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u32 reg;
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struct __attribute__((packed)) spi_ffctrl_bitfield {
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unsigned int ffstart : 1; /* FIFO Start */
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unsigned int : 31;
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} bitfield;
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u32 reg;
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};
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@ -173,276 +173,276 @@ union kp_spi_ffctrl {
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/***************
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* SPI Helpers *
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***************/
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static inline int
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static inline int
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kp_spi_bytes_per_word(int word_len)
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{
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if (word_len <= 8){
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return 1;
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}
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else if (word_len <= 16) {
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return 2;
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}
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else { /* word_len <= 32 */
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return 4;
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}
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if (word_len <= 8){
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return 1;
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}
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else if (word_len <= 16) {
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return 2;
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}
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else { /* word_len <= 32 */
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return 4;
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}
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}
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static inline u64
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static inline u64
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kp_spi_read_reg(struct kp_spi_controller_state *cs, int idx)
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{
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u64 __iomem *addr = cs->base;
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u64 val;
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u64 __iomem *addr = cs->base;
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u64 val;
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addr += idx;
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if ((idx == KP_SPI_REG_CONFIG) && (cs->conf_cache >= 0)){
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return cs->conf_cache;
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}
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val = readq((void*)addr);
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return val;
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addr += idx;
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if ((idx == KP_SPI_REG_CONFIG) && (cs->conf_cache >= 0)){
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return cs->conf_cache;
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}
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val = readq((void*)addr);
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return val;
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}
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static inline void
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static inline void
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kp_spi_write_reg(struct kp_spi_controller_state *cs, int idx, u64 val)
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{
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u64 __iomem *addr = cs->base;
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addr += idx;
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writeq(val, (void*)addr);
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if (idx == KP_SPI_REG_CONFIG)
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cs->conf_cache = val;
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u64 __iomem *addr = cs->base;
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addr += idx;
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writeq(val, (void*)addr);
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if (idx == KP_SPI_REG_CONFIG)
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cs->conf_cache = val;
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}
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static int
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static int
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kp_spi_wait_for_reg_bit(struct kp_spi_controller_state *cs, int idx, unsigned long bit)
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{
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unsigned long timeout;
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timeout = jiffies + msecs_to_jiffies(1000);
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while (!(kp_spi_read_reg(cs, idx) & bit)) {
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if (time_after(jiffies, timeout)) {
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if (!(kp_spi_read_reg(cs, idx) & bit)) {
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return -ETIMEDOUT;
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} else {
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return 0;
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}
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}
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cpu_relax();
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}
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return 0;
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unsigned long timeout;
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timeout = jiffies + msecs_to_jiffies(1000);
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while (!(kp_spi_read_reg(cs, idx) & bit)) {
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if (time_after(jiffies, timeout)) {
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if (!(kp_spi_read_reg(cs, idx) & bit)) {
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return -ETIMEDOUT;
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} else {
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return 0;
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}
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}
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cpu_relax();
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}
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return 0;
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}
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static unsigned
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static unsigned
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kp_spi_txrx_pio(struct spi_device *spidev, struct spi_transfer *transfer)
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{
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struct kp_spi_controller_state *cs = spidev->controller_state;
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unsigned int count = transfer->len;
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unsigned int c = count;
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int i;
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u8 *rx = transfer->rx_buf;
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const u8 *tx = transfer->tx_buf;
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int processed = 0;
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if (tx) {
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for (i = 0 ; i < c ; i++) {
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char val = *tx++;
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if (kp_spi_wait_for_reg_bit(cs, KP_SPI_REG_STATUS, KP_SPI_REG_STATUS_TXS) < 0) {
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goto out;
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}
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kp_spi_write_reg(cs, KP_SPI_REG_TXDATA, val);
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processed++;
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}
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}
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else if(rx) {
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for (i = 0 ; i < c ; i++) {
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char test=0;
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kp_spi_write_reg(cs, KP_SPI_REG_TXDATA, 0x00);
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if (kp_spi_wait_for_reg_bit(cs, KP_SPI_REG_STATUS, KP_SPI_REG_STATUS_RXS) < 0) {
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goto out;
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}
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test = kp_spi_read_reg(cs, KP_SPI_REG_RXDATA);
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*rx++ = test;
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processed++;
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}
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}
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if (kp_spi_wait_for_reg_bit(cs, KP_SPI_REG_STATUS, KP_SPI_REG_STATUS_EOT) < 0) {
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//TODO: Figure out how to abort transaction?? This has never happened in practice though...
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}
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out:
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return processed;
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struct kp_spi_controller_state *cs = spidev->controller_state;
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unsigned int count = transfer->len;
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unsigned int c = count;
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int i;
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u8 *rx = transfer->rx_buf;
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const u8 *tx = transfer->tx_buf;
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int processed = 0;
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if (tx) {
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for (i = 0 ; i < c ; i++) {
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char val = *tx++;
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if (kp_spi_wait_for_reg_bit(cs, KP_SPI_REG_STATUS, KP_SPI_REG_STATUS_TXS) < 0) {
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goto out;
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}
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kp_spi_write_reg(cs, KP_SPI_REG_TXDATA, val);
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processed++;
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}
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}
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else if(rx) {
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for (i = 0 ; i < c ; i++) {
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char test=0;
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kp_spi_write_reg(cs, KP_SPI_REG_TXDATA, 0x00);
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if (kp_spi_wait_for_reg_bit(cs, KP_SPI_REG_STATUS, KP_SPI_REG_STATUS_RXS) < 0) {
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goto out;
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}
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test = kp_spi_read_reg(cs, KP_SPI_REG_RXDATA);
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*rx++ = test;
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processed++;
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}
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}
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if (kp_spi_wait_for_reg_bit(cs, KP_SPI_REG_STATUS, KP_SPI_REG_STATUS_EOT) < 0) {
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//TODO: Figure out how to abort transaction?? This has never happened in practice though...
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}
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out:
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return processed;
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}
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/*****************
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* SPI Functions *
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*****************/
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static int
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static int
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kp_spi_setup(struct spi_device *spidev)
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{
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union kp_spi_config sc;
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struct kp_spi *kpspi = spi_master_get_devdata(spidev->master);
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struct kp_spi_controller_state *cs;
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/* setup controller state */
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cs = spidev->controller_state;
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if (!cs) {
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cs = kzalloc(sizeof(*cs), GFP_KERNEL);
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if(!cs) {
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return -ENOMEM;
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}
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cs->base = kpspi->base;
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cs->phys = kpspi->phys;
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cs->chip_select = spidev->chip_select;
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cs->word_len = spidev->bits_per_word;
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cs->conf_cache = -1;
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spidev->controller_state = cs;
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}
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/* set config register */
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sc.bitfield.wl = spidev->bits_per_word - 1;
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sc.bitfield.cs = spidev->chip_select;
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sc.bitfield.spi_en = 0;
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sc.bitfield.trm = 0;
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sc.bitfield.ffen = 0;
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kp_spi_write_reg(spidev->controller_state, KP_SPI_REG_CONFIG, sc.reg);
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return 0;
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union kp_spi_config sc;
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struct kp_spi *kpspi = spi_master_get_devdata(spidev->master);
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struct kp_spi_controller_state *cs;
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/* setup controller state */
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cs = spidev->controller_state;
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if (!cs) {
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cs = kzalloc(sizeof(*cs), GFP_KERNEL);
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if(!cs) {
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return -ENOMEM;
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}
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cs->base = kpspi->base;
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cs->phys = kpspi->phys;
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cs->chip_select = spidev->chip_select;
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cs->word_len = spidev->bits_per_word;
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cs->conf_cache = -1;
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spidev->controller_state = cs;
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}
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/* set config register */
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sc.bitfield.wl = spidev->bits_per_word - 1;
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sc.bitfield.cs = spidev->chip_select;
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sc.bitfield.spi_en = 0;
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sc.bitfield.trm = 0;
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sc.bitfield.ffen = 0;
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kp_spi_write_reg(spidev->controller_state, KP_SPI_REG_CONFIG, sc.reg);
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return 0;
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}
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static int
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static int
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kp_spi_transfer_one_message(struct spi_master *master, struct spi_message *m)
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{
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struct kp_spi_controller_state *cs;
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struct spi_device *spidev;
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struct kp_spi *kpspi;
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struct spi_transfer *transfer;
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union kp_spi_config sc;
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int status = 0;
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spidev = m->spi;
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kpspi = spi_master_get_devdata(master);
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m->actual_length = 0;
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m->status = 0;
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cs = spidev->controller_state;
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/* reject invalid messages and transfers */
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if (list_empty(&m->transfers)) {
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return -EINVAL;
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}
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/* validate input */
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list_for_each_entry(transfer, &m->transfers, transfer_list) {
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const void *tx_buf = transfer->tx_buf;
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void *rx_buf = transfer->rx_buf;
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unsigned len = transfer->len;
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if (transfer->speed_hz > KP_SPI_CLK || (len && !(rx_buf || tx_buf))) {
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dev_dbg(kpspi->dev, " transfer: %d Hz, %d %s%s, %d bpw\n",
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transfer->speed_hz,
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len,
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tx_buf ? "tx" : "",
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rx_buf ? "rx" : "",
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transfer->bits_per_word);
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dev_dbg(kpspi->dev, " transfer -EINVAL\n");
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return -EINVAL;
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}
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if (transfer->speed_hz && (transfer->speed_hz < (KP_SPI_CLK >> 15))) {
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dev_dbg(kpspi->dev, "speed_hz %d below minimum %d Hz\n",
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transfer->speed_hz,
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KP_SPI_CLK >> 15);
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dev_dbg(kpspi->dev, " speed_hz -EINVAL\n");
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return -EINVAL;
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}
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}
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/* assert chip select to start the sequence*/
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sc.reg = kp_spi_read_reg(cs, KP_SPI_REG_CONFIG);
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sc.bitfield.spi_en = 1;
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kp_spi_write_reg(cs, KP_SPI_REG_CONFIG, sc.reg);
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/* work */
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if (kp_spi_wait_for_reg_bit(cs, KP_SPI_REG_STATUS, KP_SPI_REG_STATUS_EOT) < 0) {
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dev_info(kpspi->dev, "EOT timed out\n");
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goto out;
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}
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/* do the transfers for this message */
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list_for_each_entry(transfer, &m->transfers, transfer_list) {
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if (transfer->tx_buf == NULL && transfer->rx_buf == NULL && transfer->len) {
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status = -EINVAL;
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goto error;
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}
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/* transfer */
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if (transfer->len) {
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unsigned int word_len = spidev->bits_per_word;
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unsigned count;
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/* set up the transfer... */
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sc.reg = kp_spi_read_reg(cs, KP_SPI_REG_CONFIG);
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/* ...direction */
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if (transfer->tx_buf) {
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sc.bitfield.trm = KP_SPI_REG_CONFIG_TRM_TX;
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}
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else if (transfer->rx_buf) {
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sc.bitfield.trm = KP_SPI_REG_CONFIG_TRM_RX;
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}
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/* ...word length */
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if (transfer->bits_per_word) {
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word_len = transfer->bits_per_word;
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}
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cs->word_len = word_len;
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sc.bitfield.wl = word_len-1;
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/* ...chip select */
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sc.bitfield.cs = spidev->chip_select;
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/* ...and write the new settings */
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kp_spi_write_reg(cs, KP_SPI_REG_CONFIG, sc.reg);
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/* do the transfer */
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count = kp_spi_txrx_pio(spidev, transfer);
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m->actual_length += count;
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if (count != transfer->len) {
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status = -EIO;
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goto error;
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}
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}
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if (transfer->delay_usecs) {
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udelay(transfer->delay_usecs);
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}
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}
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/* de-assert chip select to end the sequence */
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sc.reg = kp_spi_read_reg(cs, KP_SPI_REG_CONFIG);
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sc.bitfield.spi_en = 0;
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kp_spi_write_reg(cs, KP_SPI_REG_CONFIG, sc.reg);
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out:
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/* done work */
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spi_finalize_current_message(master);
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return 0;
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struct kp_spi_controller_state *cs;
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struct spi_device *spidev;
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struct kp_spi *kpspi;
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struct spi_transfer *transfer;
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union kp_spi_config sc;
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int status = 0;
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error:
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m->status = status;
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return status;
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spidev = m->spi;
|
||||
kpspi = spi_master_get_devdata(master);
|
||||
m->actual_length = 0;
|
||||
m->status = 0;
|
||||
|
||||
cs = spidev->controller_state;
|
||||
|
||||
/* reject invalid messages and transfers */
|
||||
if (list_empty(&m->transfers)) {
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* validate input */
|
||||
list_for_each_entry(transfer, &m->transfers, transfer_list) {
|
||||
const void *tx_buf = transfer->tx_buf;
|
||||
void *rx_buf = transfer->rx_buf;
|
||||
unsigned len = transfer->len;
|
||||
|
||||
if (transfer->speed_hz > KP_SPI_CLK || (len && !(rx_buf || tx_buf))) {
|
||||
dev_dbg(kpspi->dev, " transfer: %d Hz, %d %s%s, %d bpw\n",
|
||||
transfer->speed_hz,
|
||||
len,
|
||||
tx_buf ? "tx" : "",
|
||||
rx_buf ? "rx" : "",
|
||||
transfer->bits_per_word);
|
||||
dev_dbg(kpspi->dev, " transfer -EINVAL\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
if (transfer->speed_hz && (transfer->speed_hz < (KP_SPI_CLK >> 15))) {
|
||||
dev_dbg(kpspi->dev, "speed_hz %d below minimum %d Hz\n",
|
||||
transfer->speed_hz,
|
||||
KP_SPI_CLK >> 15);
|
||||
dev_dbg(kpspi->dev, " speed_hz -EINVAL\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
/* assert chip select to start the sequence*/
|
||||
sc.reg = kp_spi_read_reg(cs, KP_SPI_REG_CONFIG);
|
||||
sc.bitfield.spi_en = 1;
|
||||
kp_spi_write_reg(cs, KP_SPI_REG_CONFIG, sc.reg);
|
||||
|
||||
/* work */
|
||||
if (kp_spi_wait_for_reg_bit(cs, KP_SPI_REG_STATUS, KP_SPI_REG_STATUS_EOT) < 0) {
|
||||
dev_info(kpspi->dev, "EOT timed out\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* do the transfers for this message */
|
||||
list_for_each_entry(transfer, &m->transfers, transfer_list) {
|
||||
if (transfer->tx_buf == NULL && transfer->rx_buf == NULL && transfer->len) {
|
||||
status = -EINVAL;
|
||||
goto error;
|
||||
}
|
||||
|
||||
/* transfer */
|
||||
if (transfer->len) {
|
||||
unsigned int word_len = spidev->bits_per_word;
|
||||
unsigned count;
|
||||
|
||||
/* set up the transfer... */
|
||||
sc.reg = kp_spi_read_reg(cs, KP_SPI_REG_CONFIG);
|
||||
|
||||
/* ...direction */
|
||||
if (transfer->tx_buf) {
|
||||
sc.bitfield.trm = KP_SPI_REG_CONFIG_TRM_TX;
|
||||
}
|
||||
else if (transfer->rx_buf) {
|
||||
sc.bitfield.trm = KP_SPI_REG_CONFIG_TRM_RX;
|
||||
}
|
||||
|
||||
/* ...word length */
|
||||
if (transfer->bits_per_word) {
|
||||
word_len = transfer->bits_per_word;
|
||||
}
|
||||
cs->word_len = word_len;
|
||||
sc.bitfield.wl = word_len-1;
|
||||
|
||||
/* ...chip select */
|
||||
sc.bitfield.cs = spidev->chip_select;
|
||||
|
||||
/* ...and write the new settings */
|
||||
kp_spi_write_reg(cs, KP_SPI_REG_CONFIG, sc.reg);
|
||||
|
||||
/* do the transfer */
|
||||
count = kp_spi_txrx_pio(spidev, transfer);
|
||||
m->actual_length += count;
|
||||
|
||||
if (count != transfer->len) {
|
||||
status = -EIO;
|
||||
goto error;
|
||||
}
|
||||
}
|
||||
|
||||
if (transfer->delay_usecs) {
|
||||
udelay(transfer->delay_usecs);
|
||||
}
|
||||
}
|
||||
|
||||
/* de-assert chip select to end the sequence */
|
||||
sc.reg = kp_spi_read_reg(cs, KP_SPI_REG_CONFIG);
|
||||
sc.bitfield.spi_en = 0;
|
||||
kp_spi_write_reg(cs, KP_SPI_REG_CONFIG, sc.reg);
|
||||
|
||||
out:
|
||||
/* done work */
|
||||
spi_finalize_current_message(master);
|
||||
return 0;
|
||||
|
||||
error:
|
||||
m->status = status;
|
||||
return status;
|
||||
}
|
||||
|
||||
static void
|
||||
static void
|
||||
kp_spi_cleanup(struct spi_device *spidev)
|
||||
{
|
||||
struct kp_spi_controller_state *cs = spidev->controller_state;
|
||||
if (cs) {
|
||||
kfree(cs);
|
||||
}
|
||||
struct kp_spi_controller_state *cs = spidev->controller_state;
|
||||
if (cs) {
|
||||
kfree(cs);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -450,101 +450,101 @@ kp_spi_cleanup(struct spi_device *spidev)
|
|||
/******************
|
||||
* Probe / Remove *
|
||||
******************/
|
||||
static int
|
||||
static int
|
||||
kp_spi_probe(struct platform_device *pldev)
|
||||
{
|
||||
struct kpc_core_device_platdata *drvdata;
|
||||
struct spi_master *master;
|
||||
struct kp_spi *kpspi;
|
||||
struct resource *r;
|
||||
int status = 0;
|
||||
int i;
|
||||
struct kpc_core_device_platdata *drvdata;
|
||||
struct spi_master *master;
|
||||
struct kp_spi *kpspi;
|
||||
struct resource *r;
|
||||
int status = 0;
|
||||
int i;
|
||||
|
||||
drvdata = pldev->dev.platform_data;
|
||||
if (!drvdata){
|
||||
dev_err(&pldev->dev, "kp_spi_probe: platform_data is NULL!\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
master = spi_alloc_master(&pldev->dev, sizeof(struct kp_spi));
|
||||
if (master == NULL) {
|
||||
dev_err(&pldev->dev, "kp_spi_probe: master allocation failed\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* set up the spi functions */
|
||||
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
|
||||
master->bits_per_word_mask = (unsigned int)SPI_BPW_RANGE_MASK(4, 32);
|
||||
master->setup = kp_spi_setup;
|
||||
master->transfer_one_message = kp_spi_transfer_one_message;
|
||||
master->cleanup = kp_spi_cleanup;
|
||||
|
||||
platform_set_drvdata(pldev, master);
|
||||
|
||||
kpspi = spi_master_get_devdata(master);
|
||||
kpspi->master = master;
|
||||
kpspi->dev = &pldev->dev;
|
||||
|
||||
master->num_chipselect = 4;
|
||||
if (pldev->id != -1) {
|
||||
master->bus_num = pldev->id;
|
||||
}
|
||||
kpspi->pin_dir = 0;
|
||||
|
||||
r = platform_get_resource(pldev, IORESOURCE_MEM, 0);
|
||||
if (r == NULL) {
|
||||
dev_err(&pldev->dev, "kp_spi_probe: Unable to get platform resources\n");
|
||||
status = -ENODEV;
|
||||
goto free_master;
|
||||
}
|
||||
|
||||
kpspi->phys = (unsigned long)ioremap_nocache(r->start, resource_size(r));
|
||||
kpspi->base = (u64 __iomem *)kpspi->phys;
|
||||
|
||||
status = spi_register_master(master);
|
||||
if (status < 0) {
|
||||
dev_err(&pldev->dev, "Unable to register SPI device\n");
|
||||
goto free_master;
|
||||
}
|
||||
|
||||
/* register the slave boards */
|
||||
#define NEW_SPI_DEVICE_FROM_BOARD_INFO_TABLE(table) \
|
||||
for (i = 0 ; i < ARRAY_SIZE(table) ; i++) { \
|
||||
spi_new_device(master, &(table[i])); \
|
||||
}
|
||||
|
||||
switch ((drvdata->card_id & 0xFFFF0000) >> 16){
|
||||
case PCI_DEVICE_ID_DAKTRONICS_KADOKA_P2KR0:
|
||||
NEW_SPI_DEVICE_FROM_BOARD_INFO_TABLE(p2kr0_board_info);
|
||||
break;
|
||||
default:
|
||||
dev_err(&pldev->dev, "Unknown hardware, cant know what partition table to use!\n");
|
||||
goto free_master;
|
||||
break;
|
||||
}
|
||||
|
||||
return status;
|
||||
drvdata = pldev->dev.platform_data;
|
||||
if (!drvdata){
|
||||
dev_err(&pldev->dev, "kp_spi_probe: platform_data is NULL!\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
free_master:
|
||||
spi_master_put(master);
|
||||
return status;
|
||||
master = spi_alloc_master(&pldev->dev, sizeof(struct kp_spi));
|
||||
if (master == NULL) {
|
||||
dev_err(&pldev->dev, "kp_spi_probe: master allocation failed\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* set up the spi functions */
|
||||
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
|
||||
master->bits_per_word_mask = (unsigned int)SPI_BPW_RANGE_MASK(4, 32);
|
||||
master->setup = kp_spi_setup;
|
||||
master->transfer_one_message = kp_spi_transfer_one_message;
|
||||
master->cleanup = kp_spi_cleanup;
|
||||
|
||||
platform_set_drvdata(pldev, master);
|
||||
|
||||
kpspi = spi_master_get_devdata(master);
|
||||
kpspi->master = master;
|
||||
kpspi->dev = &pldev->dev;
|
||||
|
||||
master->num_chipselect = 4;
|
||||
if (pldev->id != -1) {
|
||||
master->bus_num = pldev->id;
|
||||
}
|
||||
kpspi->pin_dir = 0;
|
||||
|
||||
r = platform_get_resource(pldev, IORESOURCE_MEM, 0);
|
||||
if (r == NULL) {
|
||||
dev_err(&pldev->dev, "kp_spi_probe: Unable to get platform resources\n");
|
||||
status = -ENODEV;
|
||||
goto free_master;
|
||||
}
|
||||
|
||||
kpspi->phys = (unsigned long)ioremap_nocache(r->start, resource_size(r));
|
||||
kpspi->base = (u64 __iomem *)kpspi->phys;
|
||||
|
||||
status = spi_register_master(master);
|
||||
if (status < 0) {
|
||||
dev_err(&pldev->dev, "Unable to register SPI device\n");
|
||||
goto free_master;
|
||||
}
|
||||
|
||||
/* register the slave boards */
|
||||
#define NEW_SPI_DEVICE_FROM_BOARD_INFO_TABLE(table) \
|
||||
for (i = 0 ; i < ARRAY_SIZE(table) ; i++) { \
|
||||
spi_new_device(master, &(table[i])); \
|
||||
}
|
||||
|
||||
switch ((drvdata->card_id & 0xFFFF0000) >> 16){
|
||||
case PCI_DEVICE_ID_DAKTRONICS_KADOKA_P2KR0:
|
||||
NEW_SPI_DEVICE_FROM_BOARD_INFO_TABLE(p2kr0_board_info);
|
||||
break;
|
||||
default:
|
||||
dev_err(&pldev->dev, "Unknown hardware, cant know what partition table to use!\n");
|
||||
goto free_master;
|
||||
break;
|
||||
}
|
||||
|
||||
return status;
|
||||
|
||||
free_master:
|
||||
spi_master_put(master);
|
||||
return status;
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
kp_spi_remove(struct platform_device *pldev)
|
||||
{
|
||||
struct spi_master * master = platform_get_drvdata(pldev);
|
||||
spi_unregister_master(master);
|
||||
return 0;
|
||||
struct spi_master * master = platform_get_drvdata(pldev);
|
||||
spi_unregister_master(master);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static struct platform_driver kp_spi_driver = {
|
||||
.driver = {
|
||||
.name = KP_DRIVER_NAME_SPI,
|
||||
},
|
||||
.probe = kp_spi_probe,
|
||||
.remove = kp_spi_remove,
|
||||
.driver = {
|
||||
.name = KP_DRIVER_NAME_SPI,
|
||||
},
|
||||
.probe = kp_spi_probe,
|
||||
.remove = kp_spi_remove,
|
||||
};
|
||||
|
||||
module_platform_driver(kp_spi_driver);
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user