arm64: dts: allwinner: a523: Add GMAC200 ethernet controller

The A523 SoC family has a second ethernet controller, called the
GMAC200. It is not exposed on all the SoCs in the family.

Add a device node for it. All the hardware specific settings are from
the vendor BSP.

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20250923140247.2622602-4-wens@kernel.org
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
Chen-Yu Tsai 2025-09-23 22:02:43 +08:00
parent 3a86608788
commit 460a71b564

View File

@ -182,6 +182,16 @@ rgmii0_pins: rgmii0-pins {
bias-disable;
};
rgmii1_pins: rgmii1-pins {
pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4",
"PJ5", "PJ6", "PJ7", "PJ8", "PJ9",
"PJ11", "PJ12", "PJ13", "PJ14", "PJ15";
allwinner,pinmux = <5>;
function = "gmac1";
drive-strength = <40>;
bias-disable;
};
uart0_pb_pins: uart0-pb-pins {
pins = "PB9", "PB10";
allwinner,pinmux = <2>;
@ -603,6 +613,51 @@ mdio0: mdio {
};
};
gmac1: ethernet@4510000 {
compatible = "allwinner,sun55i-a523-gmac200",
"snps,dwmac-4.20a";
reg = <0x04510000 0x10000>;
clocks = <&ccu CLK_BUS_EMAC1>, <&ccu CLK_MBUS_EMAC1>;
clock-names = "stmmaceth", "mbus";
resets = <&ccu RST_BUS_EMAC1>;
reset-names = "stmmaceth";
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
pinctrl-names = "default";
pinctrl-0 = <&rgmii1_pins>;
power-domains = <&pck600 PD_VO1>;
syscon = <&syscon>;
snps,fixed-burst;
snps,axi-config = <&gmac1_stmmac_axi_setup>;
snps,mtl-rx-config = <&gmac1_mtl_rx_setup>;
snps,mtl-tx-config = <&gmac1_mtl_tx_setup>;
status = "disabled";
mdio1: mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
gmac1_mtl_rx_setup: rx-queues-config {
snps,rx-queues-to-use = <1>;
queue0 {};
};
gmac1_stmmac_axi_setup: stmmac-axi-config {
snps,wr_osr_lmt = <0xf>;
snps,rd_osr_lmt = <0xf>;
snps,blen = <256 128 64 32 16 8 4>;
};
gmac1_mtl_tx_setup: tx-queues-config {
snps,tx-queues-to-use = <1>;
queue0 {};
};
};
ppu: power-controller@7001400 {
compatible = "allwinner,sun55i-a523-ppu";
reg = <0x07001400 0x400>;