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arm64: dts: qcom: sc8180x: Mark PCIe hosts cache-coherent

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The PCIe controllers on 8180 are cache-coherent. Mark them as such.

Fixes: d20b6c84f5 ("arm64: dts: qcom: sc8180x: Add PCIe instances")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231219-topic-8180_pcie_dmac-v1-1-5d00fc1b23fd@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Konrad Dybcio 2023-12-19 19:40:21 +01:00 committed by Bjorn Andersson
parent 49b0f4f141
commit 45e8c72712
1 changed files with 4 additions and 0 deletions
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4
arch/arm64/boot/dts/qcom/sc8180x.dtsi
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@ -1751,6 +1751,7 @@ pcie0: pcie@1c00000 {
phys = <&pcie0_phy>;
phy-names = "pciephy";
dma-coherent;
status = "disabled";
};
@ -1847,6 +1848,7 @@ pcie3: pcie@1c08000 {
phys = <&pcie3_phy>;
phy-names = "pciephy";
dma-coherent;
status = "disabled";
};
@ -1944,6 +1946,7 @@ pcie1: pcie@1c10000 {
phys = <&pcie1_phy>;
phy-names = "pciephy";
dma-coherent;
status = "disabled";
};
@ -2041,6 +2044,7 @@ pcie2: pcie@1c18000 {
phys = <&pcie2_phy>;
phy-names = "pciephy";
dma-coherent;
status = "disabled";
};