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drm/i915: Add MMIO helper for 6 ports with different offsets.
Also new registers can have different mmio offsets
per different lane per port.
v2: Use _PICK as PORT3 instead of creating a new
macro with if per port.
v3: Use _PICK directly on MMIO_PORT6. While MMIO_PORT
isn't flexible enough let's continue with MMIO_PORT6
as we have MMIO_PORT3.
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1497047175-27250-8-git-send-email-rodrigo.vivi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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@ -62,6 +62,9 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
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#define _MMIO_PORT3(pipe, a, b, c) _MMIO(_PICK(pipe, a, b, c))
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#define _PLL(pll, a, b) ((a) + (pll)*((b)-(a)))
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#define _MMIO_PLL(pll, a, b) _MMIO(_PLL(pll, a, b))
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#define _MMIO_PORT6(port, a, b, c, d, e, f) _MMIO(_PICK(port, a, b, c, d, e, f))
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#define _MMIO_PORT6_LN(port, ln, a0, a1, b, c, d, e, f) \
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_MMIO(_PICK(port, a0, b, c, d, e, f) + (ln * (a1 - a0)))
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#define _PHY3(phy, ...) _PICK(phy, __VA_ARGS__)
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#define _MMIO_PHY3(phy, a, b, c) _MMIO(_PHY3(phy, a, b, c))
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