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ARM: dts: qcom: msm8960: Add GSBI2 & GSBI7
Add the GSBI2 & GSBI7 Node, which is similar to the other GSBI nodes in this file. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Rudraksha Gupta <guptarud@gmail.com> Link: https://lore.kernel.org/r/20251124-expressatt_nfc_accel_magn_light-v4-1-9c5686ad67e2@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -149,6 +149,24 @@ i2c1-pins {
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};
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};
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i2c2_default_state: i2c2-default-state {
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i2c2-pins {
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pins = "gpio12", "gpio13";
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function = "gsbi2";
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drive-strength = <8>;
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bias-disable;
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};
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};
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i2c2_sleep_state: i2c2-sleep-state {
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i2c2-pins {
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pins = "gpio12", "gpio13";
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function = "gpio";
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drive-strength = <2>;
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bias-bus-hold;
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};
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};
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i2c3_default_state: i2c3-default-state {
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i2c3-pins {
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pins = "gpio16", "gpio17";
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@ -167,6 +185,24 @@ i2c3-pins {
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};
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};
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i2c7_default_state: i2c7-default-state {
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i2c7-pins {
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pins = "gpio32", "gpio33";
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function = "gsbi7";
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drive-strength = <8>;
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bias-disable;
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};
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};
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i2c7_sleep_state: i2c7-sleep-state {
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i2c7-pins {
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pins = "gpio32", "gpio33";
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function = "gpio";
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drive-strength = <2>;
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bias-bus-hold;
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};
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};
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i2c8_default_state: i2c8-default-state {
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i2c8-pins {
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pins = "gpio36", "gpio37";
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@ -543,6 +579,36 @@ gsbi1_spi: spi@16080000 {
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};
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};
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gsbi2: gsbi@16100000 {
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compatible = "qcom,gsbi-v1.0.0";
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reg = <0x16100000 0x100>;
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ranges;
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cell-index = <2>;
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clocks = <&gcc GSBI2_H_CLK>;
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clock-names = "iface";
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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gsbi2_i2c: i2c@16180000 {
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compatible = "qcom,i2c-qup-v1.1.1";
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reg = <0x16180000 0x1000>;
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pinctrl-0 = <&i2c2_default_state>;
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pinctrl-1 = <&i2c2_sleep_state>;
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pinctrl-names = "default", "sleep";
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interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GSBI2_QUP_CLK>,
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<&gcc GSBI2_H_CLK>;
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clock-names = "core",
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"iface";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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gsbi3: gsbi@16200000 {
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compatible = "qcom,gsbi-v1.0.0";
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reg = <0x16200000 0x100>;
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@ -600,6 +666,36 @@ gsbi5_serial: serial@16440000 {
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};
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};
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gsbi7: gsbi@16600000 {
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compatible = "qcom,gsbi-v1.0.0";
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reg = <0x16600000 0x100>;
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ranges;
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cell-index = <7>;
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clocks = <&gcc GSBI7_H_CLK>;
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clock-names = "iface";
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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gsbi7_i2c: i2c@16680000 {
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compatible = "qcom,i2c-qup-v1.1.1";
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reg = <0x16680000 0x1000>;
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pinctrl-0 = <&i2c7_default_state>;
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pinctrl-1 = <&i2c7_sleep_state>;
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pinctrl-names = "default", "sleep";
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interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GSBI7_QUP_CLK>,
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<&gcc GSBI7_H_CLK>;
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clock-names = "core",
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"iface";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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gsbi8: gsbi@1a000000 {
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compatible = "qcom,gsbi-v1.0.0";
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reg = <0x1a000000 0x100>;
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