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Only a few simple display fixes around DP MST, CRTC color

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state, and PLL sequencing.
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Merge tag 'drm-intel-next-fixes-2026-06-17' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next

Only a few simple display fixes around DP MST, CRTC color
state, and PLL sequencing.

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patch.msgid.link/ajJxbrt3a_USBecY@intel.com
This commit is contained in:
Dave Airlie 2026-06-22 08:52:33 +10:00
commit 44e3aeeb9a
3 changed files with 18 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/drm/i915/display/intel_atomic.c
View File

@ -288,6 +288,12 @@ static void intel_crtc_put_color_blobs(struct intel_crtc_state *crtc_state)
drm_property_blob_put(crtc_state->pre_csc_lut);
drm_property_blob_put(crtc_state->post_csc_lut);
crtc_state->hw.degamma_lut = NULL;
crtc_state->hw.gamma_lut = NULL;
crtc_state->hw.ctm = NULL;
crtc_state->pre_csc_lut = NULL;
crtc_state->post_csc_lut = NULL;
}
void intel_crtc_free_hw_state(struct intel_crtc_state *crtc_state)

11
drivers/gpu/drm/i915/display/intel_ddi.c
View File

@ -2652,9 +2652,6 @@ static void mtl_ddi_pre_enable_dp(struct intel_atomic_state *state,
/* 3. Select Thunderbolt */
mtl_port_buf_ctl_io_selection(encoder);
/* 4. Enable Panel Power if PPS is required */
intel_pps_on(intel_dp);
/* 5. Enable the port PLL */
intel_ddi_enable_clock(encoder, crtc_state);
@ -3708,6 +3705,14 @@ intel_ddi_pre_pll_enable(struct intel_atomic_state *state,
else if (display->platform.geminilake || display->platform.broxton)
bxt_dpio_phy_set_lane_optim_mask(encoder,
crtc_state->lane_lat_optim_mask);
/*
* There is no direct connection between the PLL and PPS, however
* enabling PPS before PLL is required to avoid PLL/DDI BUF timeouts
* during system resume. Do that matching the Bspec order as well.
*/
if (DISPLAY_VER(display) >= 14)
intel_pps_on(&dig_port->dp);
}
static void adlp_tbt_to_dp_alt_switch_wa(struct intel_encoder *encoder)

4
drivers/gpu/drm/i915/display/intel_dp_mst.c
View File

@ -722,6 +722,10 @@ static int mst_stream_compute_config(struct intel_encoder *encoder,
pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
ret = intel_pfit_compute_config(pipe_config, conn_state);
if (ret)
return ret;
ret = intel_pfit_compute_config(pipe_config, conn_state);
if (ret)
return ret;