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arm64: dts: rockchip: Add ArmSoM CM5 and CM5-IO
Add the ArmSoM CM5, an RK3576 compute module (rk3576-armsom-cm5.dtsi), and its CM5-IO carrier (rk3576-armsom-cm5-io.dts). The module has the RK806 PMIC, HYM8563 RTC, eMMC, GMAC0 with an on-module MotorComm YT8531 PHY, and the SDIO bus for the on-module WiFi. The carrier adds HDMI, a GbE RJ45, two USB-A ports behind a USB3 hub, USB-C with FUSB302 and DP alt-mode, a PCIe 2.0 x1 M.2 slot, microSD, status LEDs and a 40-pin header. The YT8531 has no crystal and takes the SoC 25 MHz reference (REFCLKO25M_GMAC0_OUT), described as a clock on the PHY node and enabled by the PHY driver. The PHY is named explicitly so it is instantiated from the device tree without an MDIO ID probe, which the PHY cannot answer until that clock is running. Its reset is described at the MDIO bus level so mdiobus releases it before the scan. Signed-off-by: Jiaxing Hu <gahing@gahingwoo.com> Link: https://patch.msgid.link/20260719034611.3623066-3-gahing@gahingwoo.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Jiaxing Hu
Heiko Stuebner
parent
f60f44c24b
commit
44a48a2397
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@ -167,6 +167,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-display-vz.dtbo
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-100ask-dshanpi-a1.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-cm5-io.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-sige5.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-sige5-v1.2-wifibt.dtbo
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-evb1-v10.dtb
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384
arch/arm64/boot/dts/rockchip/rk3576-armsom-cm5-io.dts
Normal file
384
arch/arm64/boot/dts/rockchip/rk3576-armsom-cm5-io.dts
Normal file
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@ -0,0 +1,384 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* ArmSoM CM5-IO - official carrier board for the ArmSoM CM5 (RK3576) module.
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*
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* Carrier provides:
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* - Full-size HDMI 2.1 (HDMI TX via HDPTX PHY)
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* - Gigabit Ethernet RJ45 (GMAC0 + on-module YT8531)
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* - 2x USB-A behind a USB3 hub (combphy1 + u2phy1)
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* - USB-C with PD/altmode (FUSB302 on i2c0, combphy0 + USBDP PHY)
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* - M.2 PCIe 2.0 x1 slot (combphy0 as PCIe lane)
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* - microSD card slot
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* - Green/red status LEDs, 40-pin RPi-compatible header
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* - 12 V DC barrel jack
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*
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* Copyright (c) 2024 ArmSoM
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* Copyright (c) 2026 Jiaxing Hu <gahing@gahingwoo.com>
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/soc/rockchip,vop2.h>
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#include <dt-bindings/usb/pd.h>
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#include "rk3576-armsom-cm5.dtsi"
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/ {
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model = "ArmSoM CM5-IO";
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compatible = "armsom,cm5-io", "armsom,cm5", "rockchip,rk3576";
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aliases {
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ethernet0 = &gmac0;
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mmc0 = &sdhci;
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mmc1 = &sdmmc;
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};
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chosen {
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stdout-path = "serial0:1500000n8";
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};
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hdmi-con {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con_in: endpoint {
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remote-endpoint = <&hdmi_out_con>;
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};
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};
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};
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leds: leds {
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compatible = "gpio-leds";
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led_green: led-0 {
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color = <LED_COLOR_ID_GREEN>;
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default-state = "on";
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function = LED_FUNCTION_STATUS;
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gpios = <&gpio2 RK_PD0 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&led_green_en>;
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};
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led_red: led-1 {
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color = <LED_COLOR_ID_RED>;
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default-state = "off";
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function = LED_FUNCTION_FAULT;
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gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&led_red_en>;
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};
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};
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vcc_12v0_dcin: regulator-vcc-12v0-dcin {
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compatible = "regulator-fixed";
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regulator-name = "vcc_12v0_dcin";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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/* PCIe 3.3 V for the M.2 slot */
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vcc_3v3_pcie: regulator-vcc-3v3-pcie {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_pwr_en>;
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regulator-name = "vcc_3v3_pcie";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <5000>;
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vin-supply = <&vcc_5v0_sys>;
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};
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vcc_5v0_device: regulator-vcc-5v0-device {
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compatible = "regulator-fixed";
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regulator-name = "vcc_5v0_device";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc_12v0_dcin>;
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};
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vcc_5v0_sys: regulator-vcc-5v0-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc_5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc_12v0_dcin>;
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};
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vcc_5v0_typec0: regulator-vcc-5v0-typec0 {
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compatible = "regulator-fixed";
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enable-active-high;
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gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_otg0_pwren>;
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regulator-name = "vcc_5v0_typec0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc_5v0_device>;
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};
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/* USB-A host 5 V (through the hub) */
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vcc_5v0_usbhost: regulator-vcc-5v0-usbhost {
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compatible = "regulator-fixed";
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enable-active-high;
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gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_host_pwren>;
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regulator-name = "vcc_5v0_usbhost";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc_5v0_device>;
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};
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};
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/* ComboPHY0 -> PCIe lane (M.2 slot); ComboPHY1 -> USB3 lane (USB-A hub). */
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&combphy0_ps {
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status = "okay";
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};
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&combphy1_psu {
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status = "okay";
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};
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&hdmi {
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status = "okay";
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};
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&hdmi_in {
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hdmi_in_vp0: endpoint {
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remote-endpoint = <&vp0_out_hdmi>;
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};
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};
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&hdmi_out {
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hdmi_out_con: endpoint {
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remote-endpoint = <&hdmi_con_in>;
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};
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};
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&hdmi_sound {
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status = "okay";
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};
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&hdptxphy {
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0m1_xfer>;
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status = "okay";
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usbc0: usb-typec@22 {
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compatible = "fcs,fusb302";
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reg = <0x22>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&usbc0_int>;
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vbus-supply = <&vcc_5v0_typec0>;
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usb_con: connector {
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compatible = "usb-c-connector";
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data-role = "dual";
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label = "USB-C";
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op-sink-microwatt = <1000000>;
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power-role = "dual";
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try-power-role = "sink";
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sink-pdos =
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<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
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PDO_FIXED(9000, 3000, PDO_FIXED_USB_COMM)
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PDO_FIXED(12000, 3000, PDO_FIXED_USB_COMM)>;
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source-pdos =
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<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
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altmodes {
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displayport {
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svid = /bits/ 16 <0xff01>;
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vdo = <0xffffffff>;
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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usbc0_orien_sw: endpoint {
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remote-endpoint = <&usbdp_phy_orientation_switch>;
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};
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};
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port@1 {
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reg = <1>;
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usbc0_role_sw: endpoint {
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remote-endpoint = <&usb_drd0_role_switch>;
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};
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};
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port@2 {
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reg = <2>;
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dp_altmode_mux: endpoint {
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remote-endpoint = <&usbdp_phy_dp_altmode_mux>;
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};
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};
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};
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};
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};
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};
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/* PCIe 2.0 x1 M.2 slot + */
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&pcie0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_reset>;
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reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&vcc_3v3_pcie>;
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status = "okay";
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};
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&pinctrl {
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leds {
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led_green_en: led-green-en {
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rockchip,pins = <2 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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led_red_en: led-red-en {
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rockchip,pins = <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pcie {
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pcie_pwr_en: pcie-pwr-en {
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rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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pcie_reset: pcie-reset {
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rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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usb {
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usb_host_pwren: usb-host-pwren {
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rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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usb_otg0_pwren: usb-otg0-pwren {
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rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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usbc0_int: usbc0-int {
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rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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/* SAI6 is the I2S CPU DAI feeding the HDMI audio path. */
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&sai6 {
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status = "okay";
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};
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&sdmmc {
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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disable-wp;
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max-frequency = <200000000>;
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no-sdio;
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no-mmc;
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sd-uhs-sdr104;
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vmmc-supply = <&vcc_3v3_s3>;
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vqmmc-supply = <&vccio_sd_s0>;
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status = "okay";
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};
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&u2phy0 {
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status = "okay";
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};
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&u2phy0_otg {
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phy-supply = <&vcc_5v0_typec0>;
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status = "okay";
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};
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&u2phy1 {
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status = "okay";
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};
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&u2phy1_otg {
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phy-supply = <&vcc_5v0_usbhost>;
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status = "okay";
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};
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/* Debug UART0 on the 40-pin header. */
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&uart0 {
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pinctrl-0 = <&uart0m0_xfer>;
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status = "okay";
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};
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/* USB DRD0: USB-C (USBDP SuperSpeed + USB2 HS), OTG with FUSB302 */
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&usb_drd0_dwc3 {
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dr_mode = "otg";
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usb-role-switch;
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status = "okay";
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port {
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usb_drd0_role_switch: endpoint {
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remote-endpoint = <&usbc0_role_sw>;
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};
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};
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};
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/* USB DRD1: USB-A ports behind the hub */
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&usb_drd1_dwc3 {
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dr_mode = "host";
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status = "okay";
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};
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&usbdp_phy {
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status = "okay";
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mode-switch;
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orientation-switch;
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sbu1-dc-gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
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sbu2-dc-gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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usbdp_phy_orientation_switch: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&usbc0_orien_sw>;
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};
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usbdp_phy_dp_altmode_mux: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&dp_altmode_mux>;
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};
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};
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};
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&vop {
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status = "okay";
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};
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&vop_mmu {
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status = "okay";
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};
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&vp0 {
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vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
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reg = <ROCKCHIP_VOP2_EP_HDMI0>;
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remote-endpoint = <&hdmi_in_vp0>;
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};
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};
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566
arch/arm64/boot/dts/rockchip/rk3576-armsom-cm5.dtsi
Normal file
566
arch/arm64/boot/dts/rockchip/rk3576-armsom-cm5.dtsi
Normal file
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@ -0,0 +1,566 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* ArmSoM CM5 - Rockchip RK3576 compute module (Raspberry Pi CM4 form factor).
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*
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* Common to all CM5 carriers. The carrier .dts includes this file, sets the
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* board model/compatible, and adds carrier-specific peripherals.
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*
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* On-module devices:
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* - RK806 PMIC on I2C1
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* - HYM8563 RTC on I2C2
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* - eMMC (SDHCI)
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* - GMAC0 + MotorComm YT8531 Gigabit Ethernet PHY (RGMII)
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* - SYN43752 WiFi 6 + BT 5.x (SDIO + UART4)
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*
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* Copyright (c) 2024 ArmSoM
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* Copyright (c) 2026 Jiaxing Hu <gahing@gahingwoo.com>
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include "rk3576.dtsi"
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/ {
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compatible = "armsom,cm5", "rockchip,rk3576";
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vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v1_nldo_s3";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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vin-supply = <&vcc_5v0_sys>;
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};
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vcc_1v2_ufs_vccq_s0: regulator-vcc-1v2-ufs-vccq-s0 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v2_ufs_vccq_s0";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
vin-supply = <&vcc_5v0_sys>;
|
||||
};
|
||||
|
||||
vcc_1v8_s0: regulator-vcc-1v8-s0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_1v8_s0";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vcc_1v8_s3>;
|
||||
};
|
||||
|
||||
vcc_1v8_ufs_vccq2_s0: regulator-vcc-1v8-ufs-vccq2-s0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_1v8_ufs_vccq2_s0";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vcc_1v8_s3>;
|
||||
};
|
||||
|
||||
vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_2v0_pldo_s3";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <2000000>;
|
||||
regulator-max-microvolt = <2000000>;
|
||||
vin-supply = <&vcc_5v0_sys>;
|
||||
};
|
||||
|
||||
vcc_3v3_s0: regulator-vcc-3v3-s0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3_s0";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vcc_3v3_s3>;
|
||||
};
|
||||
|
||||
vcc_3v3_ufs_s0: regulator-vcc-ufs-s0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3_ufs_s0";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vcc_5v0_sys>;
|
||||
};
|
||||
|
||||
/*
|
||||
* WiFi power sequencer for SYN43752. Reset GPIO1 PC6 active-low,
|
||||
* clock from the HYM8563 RTC oscillator.
|
||||
*/
|
||||
sdio_pwrseq: sdio-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
clocks = <&hym8563>;
|
||||
clock-names = "ext_clock";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_reg_on>;
|
||||
reset-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&cpu_b0 {
|
||||
cpu-supply = <&vdd_cpu_big_s0>;
|
||||
};
|
||||
|
||||
&cpu_b1 {
|
||||
cpu-supply = <&vdd_cpu_big_s0>;
|
||||
};
|
||||
|
||||
&cpu_b2 {
|
||||
cpu-supply = <&vdd_cpu_big_s0>;
|
||||
};
|
||||
|
||||
&cpu_b3 {
|
||||
cpu-supply = <&vdd_cpu_big_s0>;
|
||||
};
|
||||
|
||||
&cpu_l0 {
|
||||
cpu-supply = <&vdd_cpu_lit_s0>;
|
||||
};
|
||||
|
||||
&cpu_l1 {
|
||||
cpu-supply = <&vdd_cpu_lit_s0>;
|
||||
};
|
||||
|
||||
&cpu_l2 {
|
||||
cpu-supply = <&vdd_cpu_lit_s0>;
|
||||
};
|
||||
|
||||
&cpu_l3 {
|
||||
cpu-supply = <&vdd_cpu_lit_s0>;
|
||||
};
|
||||
|
||||
/*
|
||||
* GMAC0 drives an on-module MotorComm YT8531. The PHY has no local crystal and
|
||||
* takes the SoC 25 MHz reference (REFCLKO25M_GMAC0_OUT); ethm0_clk0_25m_out
|
||||
* routes that clock to the pad, and the PHY node consumes and enables it.
|
||||
*/
|
||||
&gmac0 {
|
||||
phy-mode = "rgmii-id";
|
||||
clock_in_out = "output";
|
||||
phy-handle = <&rgmii_phy0>;
|
||||
phy-supply = <&vcc_3v3_s3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <ð0m0_miim
|
||||
ð0m0_tx_bus2
|
||||
ð0m0_rx_bus2
|
||||
ð0m0_rgmii_clk
|
||||
ð0m0_rgmii_bus
|
||||
ðm0_clk0_25m_out>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpu {
|
||||
mali-supply = <&vdd_gpu_s0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
|
||||
pmic@23 {
|
||||
compatible = "rockchip,rk806";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PA6 IRQ_TYPE_LEVEL_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
|
||||
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
||||
system-power-controller;
|
||||
vcc1-supply = <&vcc_5v0_sys>;
|
||||
vcc2-supply = <&vcc_5v0_sys>;
|
||||
vcc3-supply = <&vcc_5v0_sys>;
|
||||
vcc4-supply = <&vcc_5v0_sys>;
|
||||
vcc5-supply = <&vcc_5v0_sys>;
|
||||
vcc6-supply = <&vcc_5v0_sys>;
|
||||
vcc7-supply = <&vcc_5v0_sys>;
|
||||
vcc8-supply = <&vcc_5v0_sys>;
|
||||
vcc9-supply = <&vcc_5v0_sys>;
|
||||
vcc10-supply = <&vcc_5v0_sys>;
|
||||
vcc11-supply = <&vcc_2v0_pldo_s3>;
|
||||
vcc12-supply = <&vcc_5v0_sys>;
|
||||
vcc13-supply = <&vcc_1v1_nldo_s3>;
|
||||
vcc14-supply = <&vcc_1v1_nldo_s3>;
|
||||
vcca-supply = <&vcc_5v0_sys>;
|
||||
|
||||
rk806_dvs1_null: dvs1-null-pins {
|
||||
pins = "gpio_pwrctrl1";
|
||||
function = "pin_fun0";
|
||||
};
|
||||
|
||||
rk806_dvs2_null: dvs2-null-pins {
|
||||
pins = "gpio_pwrctrl2";
|
||||
function = "pin_fun0";
|
||||
};
|
||||
|
||||
rk806_dvs3_null: dvs3-null-pins {
|
||||
pins = "gpio_pwrctrl3";
|
||||
function = "pin_fun0";
|
||||
};
|
||||
|
||||
regulators {
|
||||
vdd_cpu_big_s0: dcdc-reg1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-enable-ramp-delay = <400>;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-name = "vdd_cpu_big_s0";
|
||||
regulator-ramp-delay = <12500>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_npu_s0: dcdc-reg2 {
|
||||
regulator-boot-on;
|
||||
regulator-enable-ramp-delay = <400>;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-name = "vdd_npu_s0";
|
||||
regulator-ramp-delay = <12500>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_cpu_lit_s0: dcdc-reg3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-name = "vdd_cpu_lit_s0";
|
||||
regulator-ramp-delay = <12500>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v3_s3: dcdc-reg4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vcc_3v3_s3";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_gpu_s0: dcdc-reg5 {
|
||||
regulator-boot-on;
|
||||
regulator-enable-ramp-delay = <400>;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_gpu_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vddq_ddr_s0: dcdc-reg6 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "vddq_ddr_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_logic_s0: dcdc-reg7 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <800000>;
|
||||
regulator-name = "vdd_logic_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8_s3: dcdc-reg8 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcc_1v8_s3";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd2_ddr_s3: dcdc-reg9 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "vdd2_ddr_s3";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_ddr_s0: dcdc-reg10 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-name = "vdd_ddr_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcca_1v8_s0: pldo-reg1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcca_1v8_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcca1v8_pldo2_s0: pldo-reg2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcca1v8_pldo2_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdda_1v2_s0: pldo-reg3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-name = "vdda_1v2_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcca_3v3_s0: pldo-reg4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vcca_3v3_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_sd_s0: pldo-reg5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vccio_sd_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcca1v8_pldo6_s3: pldo-reg6 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcca1v8_pldo6_s3";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_0v75_s3: nldo-reg1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-name = "vdd_0v75_s3";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdda_ddr_pll_s0: nldo-reg2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-name = "vdda_ddr_pll_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdda0v75_hdmi_s0: nldo-reg3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <837500>;
|
||||
regulator-max-microvolt = <837500>;
|
||||
regulator-name = "vdda0v75_hdmi_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdda_0v85_s0: nldo-reg4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-name = "vdda_0v85_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdda_0v75_s0: nldo-reg5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-name = "vdda_0v75_s0";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* I2C2: HYM8563 RTC @ 0x51 (interrupt on GPIO0 PA0). */
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
|
||||
hym8563: rtc@51 {
|
||||
compatible = "haoyu,hym8563";
|
||||
reg = <0x51>;
|
||||
#clock-cells = <0>;
|
||||
clock-output-names = "hym8563";
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hym8563_int>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* The PHY reset has to be described at the MDIO bus level: mdiobus releases a
|
||||
* bus level reset before it scans for PHY IDs, whereas the per-PHY reset-gpios
|
||||
* is only applied by phylib once the PHY has already been found, which never
|
||||
* happens while the YT8531 is still held in reset.
|
||||
*
|
||||
* The compatible names the YT8531 explicitly so phylib instantiates the PHY
|
||||
* from the device tree without an MDIO ID probe; the crystal-less PHY does not
|
||||
* answer on MDIO until its driver has enabled the reference clock below.
|
||||
*/
|
||||
&mdio0 {
|
||||
reset-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
|
||||
reset-delay-us = <20000>;
|
||||
reset-post-delay-us = <100000>;
|
||||
|
||||
rgmii_phy0: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-id4f51.e91b";
|
||||
reg = <0x1>;
|
||||
clocks = <&cru REFCLKO25M_GMAC0_OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
&saradc {
|
||||
vref-supply = <&vcca_1v8_s0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* eMMC: on-module, HS400 200 MHz with enhanced strobe. */
|
||||
&sdhci {
|
||||
bus-width = <8>;
|
||||
full-pwr-cycle-in-suspend;
|
||||
max-frequency = <200000000>;
|
||||
mmc-hs400-1_8v;
|
||||
mmc-hs400-enhanced-strobe;
|
||||
no-sdio;
|
||||
no-sd;
|
||||
non-removable;
|
||||
/delete-property/ supports-cqe;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* SDIO: SYN43752 WiFi, power-sequenced by sdio_pwrseq, clock from HYM8563. */
|
||||
&sdio {
|
||||
bus-width = <4>;
|
||||
cap-sdio-irq;
|
||||
disable-wp;
|
||||
keep-power-in-suspend;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
no-sd;
|
||||
no-mmc;
|
||||
non-removable;
|
||||
sd-uhs-sdr50;
|
||||
sd-uhs-sdr104;
|
||||
vmmc-supply = <&vcc_3v3_s3>;
|
||||
vqmmc-supply = <&vcc_1v8_s3>;
|
||||
wakeup-source;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* UART4: Bluetooth (SYN43752). */
|
||||
&uart4 {
|
||||
pinctrl-0 = <&uart4m1_xfer &uart4m1_ctsn &uart4m1_rtsn>;
|
||||
pinctrl-names = "default";
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
hym8563 {
|
||||
hym8563_int: hym8563-int {
|
||||
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-wlan {
|
||||
/* GPIO1 PC6 - WiFi power enable / reset (sdio_pwrseq) */
|
||||
wifi_reg_on: wifi-reg-on {
|
||||
rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user