From 44791c0fe327d3e43447094b0abca3bd768b16e4 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 5 Jul 2024 10:01:02 +0200 Subject: [PATCH] ARM: dts: stm32: Disable PHY clock output on DH STM32MP13xx DHCOR DHSBC board The RTL8211F PHY clock output is not used on DH STM32MP13xx DHCOR DHSBC board, disable it to improve EMI characteristics. Signed-off-by: Marek Vasut Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts b/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts index bacb70b4256b..201fb6a291cc 100644 --- a/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts +++ b/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts @@ -94,6 +94,7 @@ ethphy1: ethernet-phy@1 { interrupt-parent = <&gpiog>; interrupts = <12 IRQ_TYPE_LEVEL_LOW>; reg = <1>; + realtek,clkout-disable; reset-assert-us = <15000>; reset-deassert-us = <55000>; reset-gpios = <&gpioa 11 GPIO_ACTIVE_LOW>; @@ -121,6 +122,7 @@ ethphy2: ethernet-phy@1 { interrupt-parent = <&gpiog>; interrupts = <15 IRQ_TYPE_LEVEL_LOW>; reg = <1>; + realtek,clkout-disable; reset-assert-us = <15000>; reset-deassert-us = <55000>; reset-gpios = <&gpiog 8 GPIO_ACTIVE_LOW>;