github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-06-04 20:46:48 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

arm64: dts: qcom: qcs615: Add OSM l3 interconnect provider node and CPU OPP tables to scale DDR/L3

Browse Source 
Add Operation State Manager (OSM) L3 interconnect provide node and OPP
tables required to scale DDR and L3 per freq-domain on QCS615 SoC.
As QCS615 and SM8150 SoCs have same OSM hardware, added SM8150
compatible as fallback for QCS615 OSM device node.

Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250819-talos-l3-icc-v3-2-04529e85dac7@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Raviteja Laggyshetty 2025-08-19 11:24:47 +00:00 committed by Bjorn Andersson
parent fe9829de17
commit 44562f5918
1 changed files with 148 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

148
arch/arm64/boot/dts/qcom/sm6150.dtsi
View File

@ -11,6 +11,7 @@
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/dma/qcom-gpi.h>
#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,qcs615-rpmh.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/qcom-rpmpd.h>
@ -39,6 +40,10 @@ cpu0: cpu@0 {
clocks = <&cpufreq_hw 0>;
qcom,freq-domain = <&cpufreq_hw 0>;
#cooling-cells = <2>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
l2_0: l2-cache {
compatible = "cache";
@ -60,6 +65,10 @@ cpu1: cpu@100 {
next-level-cache = <&l2_100>;
clocks = <&cpufreq_hw 0>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
l2_100: l2-cache {
compatible = "cache";
@ -81,6 +90,10 @@ cpu2: cpu@200 {
next-level-cache = <&l2_200>;
clocks = <&cpufreq_hw 0>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
l2_200: l2-cache {
compatible = "cache";
@ -102,6 +115,10 @@ cpu3: cpu@300 {
next-level-cache = <&l2_300>;
clocks = <&cpufreq_hw 0>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
l2_300: l2-cache {
compatible = "cache";
@ -123,6 +140,10 @@ cpu4: cpu@400 {
next-level-cache = <&l2_400>;
clocks = <&cpufreq_hw 0>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
l2_400: l2-cache {
compatible = "cache";
@ -144,6 +165,10 @@ cpu5: cpu@500 {
next-level-cache = <&l2_500>;
clocks = <&cpufreq_hw 0>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
l2_500: l2-cache {
compatible = "cache";
@ -166,6 +191,10 @@ cpu6: cpu@600 {
clocks = <&cpufreq_hw 1>;
qcom,freq-domain = <&cpufreq_hw 1>;
#cooling-cells = <2>;
operating-points-v2 = <&cpu6_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
l2_600: l2-cache {
compatible = "cache";
@ -187,6 +216,10 @@ cpu7: cpu@700 {
next-level-cache = <&l2_700>;
clocks = <&cpufreq_hw 1>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu6_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
l2_700: l2-cache {
compatible = "cache";
@ -239,6 +272,111 @@ l3_0: l3-cache {
};
};
cpu0_opp_table: opp-table-cpu0 {
compatible = "operating-points-v2";
opp-shared;
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-peak-kBps = <(300000 * 4) (300000 * 16)>;
};
opp-576000000 {
opp-hz = /bits/ 64 <576000000>;
opp-peak-kBps = <(300000 * 4) (576000 * 16)>;
};
opp-748800000 {
opp-hz = /bits/ 64 <748800000>;
opp-peak-kBps = <(300000 * 4) (576000 * 16)>;
};
opp-998400000 {
opp-hz = /bits/ 64 <998400000>;
opp-peak-kBps = <(451000 * 4) (806400 * 16)>;
};
opp-1209600000 {
opp-hz = /bits/ 64 <1209600000>;
opp-peak-kBps = <(547000 * 4) (1017600 * 16)>;
};
opp-1363200000 {
opp-hz = /bits/ 64 <1363200000>;
opp-peak-kBps = <(768000 * 4) (1209600 * 16)>;
};
opp-1516800000 {
opp-hz = /bits/ 64 <1516800000>;
opp-peak-kBps = <(768000 * 4) (1209600 * 16)>;
};
opp-1593600000 {
opp-hz = /bits/ 64 <1593600000>;
opp-peak-kBps = <(1017000 * 4) (1363200 * 16)>;
};
};
cpu6_opp_table: opp-table-cpu6 {
compatible = "operating-points-v2";
opp-shared;
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-peak-kBps = <(451000 * 4) (300000 * 16)>;
};
opp-652800000 {
opp-hz = /bits/ 64 <652800000>;
opp-peak-kBps = <(451000 * 4) (576000 * 16)>;
};
opp-768000000 {
opp-hz = /bits/ 64 <768000000>;
opp-peak-kBps = <(451000 * 4) (576000 * 16)>;
};
opp-979200000 {
opp-hz = /bits/ 64 <979200000>;
opp-peak-kBps = <(547000 * 4) (806400 * 16)>;
};
opp-1017600000 {
opp-hz = /bits/ 64 <1017600000>;
opp-peak-kBps = <(547000 * 4) (806400 * 16)>;
};
opp-1094400000 {
opp-hz = /bits/ 64 <109440000>;
opp-peak-kBps = <(1017600 * 4) (940800 * 16)>;
};
opp-1209600000 {
opp-hz = /bits/ 64 <1209600000>;
opp-peak-kBps = <(1017600 * 4) (1017600 * 16)>;
};
opp-1363200000 {
opp-hz = /bits/ 64 <1363200000>;
opp-peak-kBps = <(1555000 * 4) (1209600 * 16)>;
};
opp-1516800000 {
opp-hz = /bits/ 64 <1516800000>;
opp-peak-kBps = <(1555000 * 4) (1209600 * 16)>;
};
opp-1708800000 {
opp-hz = /bits/ 64 <1708800000>;
opp-peak-kBps = <(1555000 * 4) (1363200 * 16)>;
};
opp-1900800000 {
opp-hz = /bits/ 64 <1900800000>;
opp-peak-kBps = <(1555000 * 4) (1363200 * 16)>;
};
};
dummy_eud: dummy-sink {
compatible = "arm,coresight-dummy-sink";
@ -3978,6 +4116,16 @@ rpmhpd_opp_turbo_l1: opp-9 {
};
};
osm_l3: interconnect@18321000 {
compatible = "qcom,qcs615-osm-l3", "qcom,sm8150-osm-l3", "qcom,osm-l3";
reg = <0x0 0x18321000 0x0 0x1400>;
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
clock-names = "xo", "alternate";
#interconnect-cells = <1>;
};
usb_1_hsphy: phy@88e2000 {
compatible = "qcom,qcs615-qusb2-phy";
reg = <0x0 0x88e2000 0x0 0x180>;