From 43e1705ecab981c66baee89041e6f728c0436f19 Mon Sep 17 00:00:00 2001 From: Lucas Tanure Date: Sat, 29 Aug 2026 10:47:55 +0100 Subject: [PATCH] clk: meson: t7: keep the memory fabric clocks running Four clocks feed the bus that moves data between the peripherals and memory. Nothing in Linux claims them, so they were switched off shortly after boot, and any device that started a transfer after that point simply stopped. The SD card, which comes up about two seconds in, never finished reading its identification. There is no device these clocks belong to, so mark them as always needed. Fixes: fab4d651b592 ("clk: meson: t7: add t7 clock peripherals controller driver") Assisted-by: Claude:claude-opus-5 Signed-off-by: Lucas Tanure Link: https://patch.msgid.link/20260829094758.23248-2-tanure@linux.com Signed-off-by: Jerome Brunet --- drivers/clk/meson/t7-peripherals.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/clk/meson/t7-peripherals.c b/drivers/clk/meson/t7-peripherals.c index 214db7850d86..55d09e78593b 100644 --- a/drivers/clk/meson/t7-peripherals.c +++ b/drivers/clk/meson/t7-peripherals.c @@ -945,11 +945,16 @@ static T7_SYS_PCLK(sys_aucpu, SYS_CLK_EN0_REG0, 14, 0); static T7_SYS_PCLK(sys_cec, SYS_CLK_EN0_REG0, 16, 0); static T7_SYS_PCLK(sys_gdc, SYS_CLK_EN0_REG0, 17, 0); static T7_SYS_PCLK(sys_deswarp, SYS_CLK_EN0_REG0, 18, 0); -static T7_SYS_PCLK(sys_ampipe_nand, SYS_CLK_EN0_REG0, 19, 0); +/* + * NOTE: sys_ampipe_nand and sys_am2axi0..2 provide the clock to the AXI bus + * used for DMA between the peripherals and the DRAM. After the clocks are + * disabled, a device that starts a transfer cannot complete it. + */ +static T7_SYS_PCLK(sys_ampipe_nand, SYS_CLK_EN0_REG0, 19, CLK_IS_CRITICAL); static T7_SYS_PCLK(sys_ampipe_eth, SYS_CLK_EN0_REG0, 20, 0); -static T7_SYS_PCLK(sys_am2axi0, SYS_CLK_EN0_REG0, 21, 0); -static T7_SYS_PCLK(sys_am2axi1, SYS_CLK_EN0_REG0, 22, 0); -static T7_SYS_PCLK(sys_am2axi2, SYS_CLK_EN0_REG0, 23, 0); +static T7_SYS_PCLK(sys_am2axi0, SYS_CLK_EN0_REG0, 21, CLK_IS_CRITICAL); +static T7_SYS_PCLK(sys_am2axi1, SYS_CLK_EN0_REG0, 22, CLK_IS_CRITICAL); +static T7_SYS_PCLK(sys_am2axi2, SYS_CLK_EN0_REG0, 23, CLK_IS_CRITICAL); static T7_SYS_PCLK(sys_sd_emmc_a, SYS_CLK_EN0_REG0, 24, 0); static T7_SYS_PCLK(sys_sd_emmc_b, SYS_CLK_EN0_REG0, 25, 0); static T7_SYS_PCLK(sys_sd_emmc_c, SYS_CLK_EN0_REG0, 26, 0);