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drm/mediatek: dpi: Add support for quantization range

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For RGB colorimetry, CTA-861 support both limited and full range data
when receiving video with RGB color space.
We use drm_default_rgb_quant_range() to determine the correct setting.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220701035845.16458-6-rex-bc.chen@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
This commit is contained in:
Bo-Chen Chen 2022-07-01 11:58:34 +08:00 committed by Chun-Kuang Hu
parent aed61ef6be
commit 4393c74a88
1 changed files with 21 additions and 13 deletions
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34
drivers/gpu/drm/mediatek/mtk_dpi.c
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@ -238,16 +238,30 @@ static void mtk_dpi_config_fb_size(struct mtk_dpi *dpi, u32 width, u32 height)
mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, VSIZE_MASK);
}
static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi,
struct mtk_dpi_yc_limit *limit)
static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi)
{
mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_bottom << Y_LIMINT_BOT,
struct mtk_dpi_yc_limit limit;
if (drm_default_rgb_quant_range(&dpi->mode) ==
HDMI_QUANTIZATION_RANGE_LIMITED) {
limit.y_bottom = 0x10;
limit.y_top = 0xfe0;
limit.c_bottom = 0x10;
limit.c_top = 0xfe0;
} else {
limit.y_bottom = 0;
limit.y_top = 0xfff;
limit.c_bottom = 0;
limit.c_top = 0xfff;
}
mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit.y_bottom << Y_LIMINT_BOT,
Y_LIMINT_BOT_MASK);
mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_top << Y_LIMINT_TOP,
mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit.y_top << Y_LIMINT_TOP,
Y_LIMINT_TOP_MASK);
mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_bottom << C_LIMIT_BOT,
mtk_dpi_mask(dpi, DPI_C_LIMIT, limit.c_bottom << C_LIMIT_BOT,
C_LIMIT_BOT_MASK);
mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_top << C_LIMIT_TOP,
mtk_dpi_mask(dpi, DPI_C_LIMIT, limit.c_top << C_LIMIT_TOP,
C_LIMIT_TOP_MASK);
}
@ -438,7 +452,6 @@ static int mtk_dpi_power_on(struct mtk_dpi *dpi)
static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
struct drm_display_mode *mode)
{
struct mtk_dpi_yc_limit limit;
struct mtk_dpi_polarities dpi_pol;
struct mtk_dpi_sync_param hsync;
struct mtk_dpi_sync_param vsync_lodd = { 0 };
@ -473,11 +486,6 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
dev_dbg(dpi->dev, "Got PLL %lu Hz, pixel clock %lu Hz\n",
pll_rate, vm.pixelclock);
limit.c_bottom = 0x0010;
limit.c_top = 0x0FE0;
limit.y_bottom = 0x0010;
limit.y_top = 0x0FE0;
dpi_pol.ck_pol = MTK_DPI_POLARITY_FALLING;
dpi_pol.de_pol = MTK_DPI_POLARITY_RISING;
dpi_pol.hsync_pol = vm.flags & DISPLAY_FLAGS_HSYNC_HIGH ?
@ -525,7 +533,7 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
else
mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive);
mtk_dpi_config_channel_limit(dpi, &limit);
mtk_dpi_config_channel_limit(dpi);
mtk_dpi_config_bit_num(dpi, dpi->bit_num);
mtk_dpi_config_channel_swap(dpi, dpi->channel_swap);
mtk_dpi_config_yc_map(dpi, dpi->yc_map);