github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-23 14:42:08 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

arm64: dts: ti: k3-am62a7: Correct L2 cache size to 512KB

Browse Source 
Per AM62Ax SoC datasheet[0] L2 cache is 512KB.

[0] https://www.ti.com/lit/gpn/am62a7 Page 1.

Fixes: 5fc6b1b626 ("arm64: dts: ti: Introduce AM62A7 family of SoCs")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230320044935.2512288-2-vigneshr@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
Vignesh Raghavendra 2023-03-20 10:19:35 +05:30 committed by Nishanth Menon
parent 6974371cab
commit 438b8dc949
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/ti/k3-am62a7.dtsi
View File

@ -97,7 +97,7 @@ L2_0: l2-cache0 {
compatible = "cache";
cache-unified;
cache-level = <2>;
cache-size = <0x40000>;
cache-size = <0x80000>;
cache-line-size = <64>;
cache-sets = <512>;
};