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soc: qcom: llcc: Skip ECC interrupt setup on Shikra, pre-configured by DSF

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On Shikra, the DDR System Firmware (DSF) configures ECC interrupt
routing before the kernel driver probes — it enables Tag/Data RAM
interrupts and programs error thresholds in the LLCC interrupt-enable
registers.

Set irq_configured in shikra_cfg so that qcom_llcc_edac_probe() skips
calling qcom_llcc_core_setup(), which would otherwise overwrite the
firmware-managed register state with redundant writes.

Signed-off-by: Faiyaz Mohammed <faiyaz.mohammed@oss.qualcomm.com>
Reviewed-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Reviewed-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260713-shikra-edac-v2-1-22fcb3ca9fb9@qti.qualcomm.com
[bjorn: Changed subject prefix]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Faiyaz Mohammed 2026-07-13 15:28:52 +05:30 committed by Bjorn Andersson
parent 26ead60b1a
commit 43584144a4
1 changed files with 1 additions and 0 deletions
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drivers/soc/qcom/llcc-qcom.c
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@ -4595,6 +4595,7 @@ static const struct qcom_llcc_config shikra_cfg[] = {
.size = ARRAY_SIZE(shikra_data),
.reg_offset = llcc_v2_1_reg_offset,
.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
.irq_configured = true,
},
};