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misc: amd-sbi: Move protocol functionality to core file
- This is done to utilize the protocol functionality into other domains. - Increase the scalability of the module with different bus(i2c/i3c) Reviewed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com> Signed-off-by: Akshay Gupta <akshay.gupta@amd.com> Link: https://lore.kernel.org/r/20250428063034.2145566-3-akshay.gupta@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Akshay Gupta
Greg Kroah-Hartman
parent
e156586764
commit
43470595e7
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@ -1,9 +1,10 @@
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# SPDX-License-Identifier: GPL-2.0-only
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config AMD_SBRMI_I2C
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tristate "AMD side band RMI support"
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depends on I2C
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help
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Side band RMI over I2C support for AMD out of band management.
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tristate "AMD side band RMI support"
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depends on I2C
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depends on HWMON
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help
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Side band RMI over I2C support for AMD out of band management.
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This driver can also be built as a module. If so, the module will
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be called sbrmi-i2c.
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@ -1,2 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0-only
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obj-$(CONFIG_AMD_SBRMI_I2C) += sbrmi.o
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sbrmi-i2c-objs := rmi-i2c.o rmi-core.o
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obj-$(CONFIG_AMD_SBRMI_I2C) += sbrmi-i2c.o
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113
drivers/misc/amd-sbi/rmi-core.c
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113
drivers/misc/amd-sbi/rmi-core.c
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@ -0,0 +1,113 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* sbrmi-core.c - file defining SB-RMI protocols compliant
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* AMD SoC device.
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*
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* Copyright (C) 2025 Advanced Micro Devices, Inc.
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/i2c.h>
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#include <linux/mutex.h>
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#include "rmi-core.h"
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/* Mask for Status Register bit[1] */
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#define SW_ALERT_MASK 0x2
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/* Software Interrupt for triggering */
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#define START_CMD 0x80
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#define TRIGGER_MAILBOX 0x01
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int rmi_mailbox_xfer(struct sbrmi_data *data,
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struct sbrmi_mailbox_msg *msg)
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{
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int i, ret, retry = 10;
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int sw_status;
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u8 byte;
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mutex_lock(&data->lock);
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/* Indicate firmware a command is to be serviced */
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ret = i2c_smbus_write_byte_data(data->client,
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SBRMI_INBNDMSG7, START_CMD);
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if (ret < 0)
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goto exit_unlock;
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/* Write the command to SBRMI::InBndMsg_inst0 */
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ret = i2c_smbus_write_byte_data(data->client,
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SBRMI_INBNDMSG0, msg->cmd);
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if (ret < 0)
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goto exit_unlock;
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/*
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* For both read and write the initiator (BMC) writes
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* Command Data In[31:0] to SBRMI::InBndMsg_inst[4:1]
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* SBRMI_x3C(MSB):SBRMI_x39(LSB)
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*/
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for (i = 0; i < 4; i++) {
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byte = (msg->data_in >> i * 8) & 0xff;
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ret = i2c_smbus_write_byte_data(data->client,
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SBRMI_INBNDMSG1 + i, byte);
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if (ret < 0)
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goto exit_unlock;
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}
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/*
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* Write 0x01 to SBRMI::SoftwareInterrupt to notify firmware to
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* perform the requested read or write command
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*/
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ret = i2c_smbus_write_byte_data(data->client,
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SBRMI_SW_INTERRUPT, TRIGGER_MAILBOX);
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if (ret < 0)
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goto exit_unlock;
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/*
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* Firmware will write SBRMI::Status[SwAlertSts]=1 to generate
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* an ALERT (if enabled) to initiator (BMC) to indicate completion
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* of the requested command
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*/
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do {
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sw_status = i2c_smbus_read_byte_data(data->client,
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SBRMI_STATUS);
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if (sw_status < 0) {
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ret = sw_status;
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goto exit_unlock;
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}
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if (sw_status & SW_ALERT_MASK)
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break;
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usleep_range(50, 100);
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} while (retry--);
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if (retry < 0) {
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dev_err(&data->client->dev,
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"Firmware fail to indicate command completion\n");
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ret = -EIO;
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goto exit_unlock;
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}
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/*
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* For a read operation, the initiator (BMC) reads the firmware
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* response Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1]
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* {SBRMI_x34(MSB):SBRMI_x31(LSB)}.
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*/
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if (msg->read) {
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for (i = 0; i < 4; i++) {
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ret = i2c_smbus_read_byte_data(data->client,
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SBRMI_OUTBNDMSG1 + i);
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if (ret < 0)
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goto exit_unlock;
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msg->data_out |= ret << i * 8;
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}
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}
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/*
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* BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the
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* ALERT to initiator
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*/
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ret = i2c_smbus_write_byte_data(data->client, SBRMI_STATUS,
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sw_status | SW_ALERT_MASK);
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exit_unlock:
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mutex_unlock(&data->lock);
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return ret;
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}
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63
drivers/misc/amd-sbi/rmi-core.h
Normal file
63
drivers/misc/amd-sbi/rmi-core.h
Normal file
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@ -0,0 +1,63 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2025 Advanced Micro Devices, Inc.
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*/
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#ifndef _SBRMI_CORE_H_
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#define _SBRMI_CORE_H_
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#include <linux/mutex.h>
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#include <linux/i2c.h>
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#include <linux/platform_device.h>
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/* SB-RMI registers */
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enum sbrmi_reg {
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SBRMI_CTRL = 0x01,
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SBRMI_STATUS,
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SBRMI_OUTBNDMSG0 = 0x30,
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SBRMI_OUTBNDMSG1,
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SBRMI_OUTBNDMSG2,
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SBRMI_OUTBNDMSG3,
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SBRMI_OUTBNDMSG4,
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SBRMI_OUTBNDMSG5,
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SBRMI_OUTBNDMSG6,
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SBRMI_OUTBNDMSG7,
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SBRMI_INBNDMSG0,
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SBRMI_INBNDMSG1,
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SBRMI_INBNDMSG2,
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SBRMI_INBNDMSG3,
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SBRMI_INBNDMSG4,
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SBRMI_INBNDMSG5,
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SBRMI_INBNDMSG6,
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SBRMI_INBNDMSG7,
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SBRMI_SW_INTERRUPT,
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};
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/*
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* SB-RMI supports soft mailbox service request to MP1 (power management
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* firmware) through SBRMI inbound/outbound message registers.
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* SB-RMI message IDs
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*/
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enum sbrmi_msg_id {
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SBRMI_READ_PKG_PWR_CONSUMPTION = 0x1,
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SBRMI_WRITE_PKG_PWR_LIMIT,
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SBRMI_READ_PKG_PWR_LIMIT,
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SBRMI_READ_PKG_MAX_PWR_LIMIT,
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};
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/* Each client has this additional data */
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struct sbrmi_data {
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struct i2c_client *client;
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struct mutex lock;
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u32 pwr_limit_max;
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};
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struct sbrmi_mailbox_msg {
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u8 cmd;
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bool read;
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u32 data_in;
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u32 data_out;
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};
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int rmi_mailbox_xfer(struct sbrmi_data *data, struct sbrmi_mailbox_msg *msg);
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#endif /*_SBRMI_CORE_H_*/
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@ -1,9 +1,9 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* sbrmi.c - hwmon driver for a SB-RMI mailbox
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* compliant AMD SoC device.
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* rmi-i2c.c - Side band RMI over I2C support for AMD out
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* of band management
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*
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* Copyright (C) 2020-2021 Advanced Micro Devices, Inc.
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* Copyright (C) 2024 Advanced Micro Devices, Inc.
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*/
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#include <linux/delay.h>
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@ -14,64 +14,10 @@
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include "rmi-core.h"
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/* Do not allow setting negative power limit */
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#define SBRMI_PWR_MIN 0
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/* Mask for Status Register bit[1] */
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#define SW_ALERT_MASK 0x2
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/* Software Interrupt for triggering */
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#define START_CMD 0x80
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#define TRIGGER_MAILBOX 0x01
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/*
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* SB-RMI supports soft mailbox service request to MP1 (power management
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* firmware) through SBRMI inbound/outbound message registers.
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* SB-RMI message IDs
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*/
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enum sbrmi_msg_id {
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SBRMI_READ_PKG_PWR_CONSUMPTION = 0x1,
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SBRMI_WRITE_PKG_PWR_LIMIT,
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SBRMI_READ_PKG_PWR_LIMIT,
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SBRMI_READ_PKG_MAX_PWR_LIMIT,
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};
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/* SB-RMI registers */
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enum sbrmi_reg {
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SBRMI_CTRL = 0x01,
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SBRMI_STATUS,
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SBRMI_OUTBNDMSG0 = 0x30,
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SBRMI_OUTBNDMSG1,
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SBRMI_OUTBNDMSG2,
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SBRMI_OUTBNDMSG3,
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SBRMI_OUTBNDMSG4,
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SBRMI_OUTBNDMSG5,
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SBRMI_OUTBNDMSG6,
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SBRMI_OUTBNDMSG7,
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SBRMI_INBNDMSG0,
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SBRMI_INBNDMSG1,
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SBRMI_INBNDMSG2,
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SBRMI_INBNDMSG3,
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SBRMI_INBNDMSG4,
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SBRMI_INBNDMSG5,
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SBRMI_INBNDMSG6,
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SBRMI_INBNDMSG7,
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SBRMI_SW_INTERRUPT,
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};
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/* Each client has this additional data */
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struct sbrmi_data {
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struct i2c_client *client;
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struct mutex lock;
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u32 pwr_limit_max;
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};
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struct sbrmi_mailbox_msg {
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u8 cmd;
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bool read;
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u32 data_in;
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u32 data_out;
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};
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static int sbrmi_enable_alert(struct i2c_client *client)
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{
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@ -94,100 +40,6 @@ static int sbrmi_enable_alert(struct i2c_client *client)
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return 0;
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}
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static int rmi_mailbox_xfer(struct sbrmi_data *data,
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struct sbrmi_mailbox_msg *msg)
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{
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int i, ret, retry = 10;
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int sw_status;
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u8 byte;
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mutex_lock(&data->lock);
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/* Indicate firmware a command is to be serviced */
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ret = i2c_smbus_write_byte_data(data->client,
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SBRMI_INBNDMSG7, START_CMD);
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if (ret < 0)
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goto exit_unlock;
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/* Write the command to SBRMI::InBndMsg_inst0 */
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ret = i2c_smbus_write_byte_data(data->client,
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SBRMI_INBNDMSG0, msg->cmd);
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if (ret < 0)
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goto exit_unlock;
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/*
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* For both read and write the initiator (BMC) writes
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* Command Data In[31:0] to SBRMI::InBndMsg_inst[4:1]
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* SBRMI_x3C(MSB):SBRMI_x39(LSB)
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*/
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for (i = 0; i < 4; i++) {
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byte = (msg->data_in >> i * 8) & 0xff;
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ret = i2c_smbus_write_byte_data(data->client,
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SBRMI_INBNDMSG1 + i, byte);
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if (ret < 0)
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goto exit_unlock;
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}
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/*
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* Write 0x01 to SBRMI::SoftwareInterrupt to notify firmware to
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* perform the requested read or write command
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*/
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ret = i2c_smbus_write_byte_data(data->client,
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SBRMI_SW_INTERRUPT, TRIGGER_MAILBOX);
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if (ret < 0)
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goto exit_unlock;
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/*
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* Firmware will write SBRMI::Status[SwAlertSts]=1 to generate
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* an ALERT (if enabled) to initiator (BMC) to indicate completion
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* of the requested command
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*/
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do {
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sw_status = i2c_smbus_read_byte_data(data->client,
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SBRMI_STATUS);
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if (sw_status < 0) {
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ret = sw_status;
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goto exit_unlock;
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}
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if (sw_status & SW_ALERT_MASK)
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break;
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usleep_range(50, 100);
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} while (retry--);
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if (retry < 0) {
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dev_err(&data->client->dev,
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"Firmware fail to indicate command completion\n");
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ret = -EIO;
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goto exit_unlock;
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}
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/*
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* For a read operation, the initiator (BMC) reads the firmware
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* response Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1]
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* {SBRMI_x34(MSB):SBRMI_x31(LSB)}.
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*/
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if (msg->read) {
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for (i = 0; i < 4; i++) {
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ret = i2c_smbus_read_byte_data(data->client,
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SBRMI_OUTBNDMSG1 + i);
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if (ret < 0)
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goto exit_unlock;
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msg->data_out |= ret << i * 8;
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}
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}
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/*
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* BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the
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* ALERT to initiator
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*/
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ret = i2c_smbus_write_byte_data(data->client, SBRMI_STATUS,
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sw_status | SW_ALERT_MASK);
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exit_unlock:
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mutex_unlock(&data->lock);
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return ret;
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}
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static int sbrmi_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *val)
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{
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@ -297,7 +149,7 @@ static int sbrmi_get_max_pwr_limit(struct sbrmi_data *data)
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return ret;
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}
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static int sbrmi_probe(struct i2c_client *client)
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static int sbrmi_i2c_probe(struct i2c_client *client)
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{
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struct device *dev = &client->dev;
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struct device *hwmon_dev;
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@ -323,12 +175,11 @@ static int sbrmi_probe(struct i2c_client *client)
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hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, data,
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&sbrmi_chip_info, NULL);
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return PTR_ERR_OR_ZERO(hwmon_dev);
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}
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static const struct i2c_device_id sbrmi_id[] = {
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{"sbrmi"},
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{"sbrmi-i2c"},
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{}
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};
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MODULE_DEVICE_TABLE(i2c, sbrmi_id);
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@ -343,15 +194,16 @@ MODULE_DEVICE_TABLE(of, sbrmi_of_match);
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static struct i2c_driver sbrmi_driver = {
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.driver = {
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.name = "sbrmi",
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.name = "sbrmi-i2c",
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.of_match_table = of_match_ptr(sbrmi_of_match),
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},
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.probe = sbrmi_probe,
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.probe = sbrmi_i2c_probe,
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.id_table = sbrmi_id,
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};
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module_i2c_driver(sbrmi_driver);
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MODULE_AUTHOR("Akshay Gupta <akshay.gupta@amd.com>");
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MODULE_AUTHOR("Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com>");
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MODULE_DESCRIPTION("Hwmon driver for AMD SB-RMI emulated sensor");
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MODULE_LICENSE("GPL");
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