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mtd: spinand: Use more specific naming for the get/set feature ops
SPI operations have been initially described through macros implicitly implying the use of a single SPI SDR bus. Macros for supporting dual and quad I/O transfers have been added on top, generally inspired by vendor naming, followed by DTR operations. Soon we might see octal and even octal DTR operations as well (including the opcode byte). Let's clarify what the macro really mean by describing the expected bus topology in the get/set feature macro names. Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> [Miquel: Fixed conflicts with -next by updating macronix driver] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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@ -22,7 +22,7 @@
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static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
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{
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struct spi_mem_op op = SPINAND_GET_FEATURE_OP(reg,
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struct spi_mem_op op = SPINAND_GET_FEATURE_1S_1S_1S_OP(reg,
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spinand->scratchbuf);
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int ret;
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@ -36,7 +36,7 @@ static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
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int spinand_write_reg_op(struct spinand_device *spinand, u8 reg, u8 val)
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{
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struct spi_mem_op op = SPINAND_SET_FEATURE_OP(reg,
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struct spi_mem_op op = SPINAND_SET_FEATURE_1S_1S_1S_OP(reg,
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spinand->scratchbuf);
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*spinand->scratchbuf = val;
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@ -549,8 +549,8 @@ static int spinand_erase_op(struct spinand_device *spinand,
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int spinand_wait(struct spinand_device *spinand, unsigned long initial_delay_us,
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unsigned long poll_delay_us, u8 *s)
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{
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struct spi_mem_op op = SPINAND_GET_FEATURE_OP(REG_STATUS,
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spinand->scratchbuf);
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struct spi_mem_op op = SPINAND_GET_FEATURE_1S_1S_1S_OP(REG_STATUS,
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spinand->scratchbuf);
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u8 status;
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int ret;
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@ -185,7 +185,7 @@ static int gd5fxgq4uexxg_ecc_get_status(struct spinand_device *spinand,
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u8 status)
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{
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u8 status2;
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struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQXXEXXG_REG_STATUS2,
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struct spi_mem_op op = SPINAND_GET_FEATURE_1S_1S_1S_OP(GD5FXGQXXEXXG_REG_STATUS2,
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spinand->scratchbuf);
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int ret;
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@ -228,7 +228,7 @@ static int gd5fxgq5xexxg_ecc_get_status(struct spinand_device *spinand,
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u8 status)
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{
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u8 status2;
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struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQXXEXXG_REG_STATUS2,
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struct spi_mem_op op = SPINAND_GET_FEATURE_1S_1S_1S_OP(GD5FXGQXXEXXG_REG_STATUS2,
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spinand->scratchbuf);
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int ret;
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@ -148,8 +148,8 @@ static int macronix_set_cont_read(struct spinand_device *spinand, bool enable)
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static int macronix_set_read_retry(struct spinand_device *spinand,
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unsigned int retry_mode)
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{
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struct spi_mem_op op = SPINAND_SET_FEATURE_OP(MACRONIX_FEATURE_ADDR_READ_RETRY,
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spinand->scratchbuf);
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struct spi_mem_op op = SPINAND_SET_FEATURE_1S_1S_1S_OP(MACRONIX_FEATURE_ADDR_READ_RETRY,
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spinand->scratchbuf);
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*spinand->scratchbuf = retry_mode;
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return spi_mem_exec_op(spinand->spimem, &op);
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@ -137,7 +137,7 @@ static const struct mtd_ooblayout_ops micron_4_ooblayout = {
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static int micron_select_target(struct spinand_device *spinand,
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unsigned int target)
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{
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struct spi_mem_op op = SPINAND_SET_FEATURE_OP(MICRON_DIE_SELECT_REG,
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struct spi_mem_op op = SPINAND_SET_FEATURE_1S_1S_1S_OP(MICRON_DIE_SELECT_REG,
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spinand->scratchbuf);
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if (target > 1)
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@ -73,7 +73,7 @@ static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand,
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{
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struct nand_device *nand = spinand_to_nand(spinand);
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u8 mbf = 0;
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struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, spinand->scratchbuf);
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struct spi_mem_op op = SPINAND_GET_FEATURE_1S_1S_1S_OP(0x30, spinand->scratchbuf);
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switch (status & STATUS_ECC_MASK) {
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case STATUS_ECC_NO_BITFLIPS:
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@ -146,7 +146,7 @@ static int w25n02kv_ecc_get_status(struct spinand_device *spinand,
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{
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struct nand_device *nand = spinand_to_nand(spinand);
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u8 mbf = 0;
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struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, spinand->scratchbuf);
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struct spi_mem_op op = SPINAND_GET_FEATURE_1S_1S_1S_OP(0x30, spinand->scratchbuf);
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switch (status & STATUS_ECC_MASK) {
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case STATUS_ECC_NO_BITFLIPS:
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@ -38,13 +38,13 @@
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SPI_MEM_OP_DUMMY(ndummy, 1), \
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SPI_MEM_OP_DATA_IN(len, buf, 1))
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#define SPINAND_SET_FEATURE_OP(reg, valptr) \
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#define SPINAND_SET_FEATURE_1S_1S_1S_OP(reg, valptr) \
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SPI_MEM_OP(SPI_MEM_OP_CMD(0x1f, 1), \
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SPI_MEM_OP_ADDR(1, reg, 1), \
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SPI_MEM_OP_NO_DUMMY, \
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SPI_MEM_OP_DATA_OUT(1, valptr, 1))
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#define SPINAND_GET_FEATURE_OP(reg, valptr) \
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#define SPINAND_GET_FEATURE_1S_1S_1S_OP(reg, valptr) \
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SPI_MEM_OP(SPI_MEM_OP_CMD(0x0f, 1), \
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SPI_MEM_OP_ADDR(1, reg, 1), \
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SPI_MEM_OP_NO_DUMMY, \
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