From d057cbc218ac07085b1dd18ed3c780b0399aa63d Mon Sep 17 00:00:00 2001 From: bui duc phuc Date: Tue, 2 Jun 2026 17:16:04 +0700 Subject: [PATCH 1/5] ASoC: dt-bindings: rockchip-spdif: Correct SPDIF clock descriptions Update the binding descriptions to match the actual clock usage, where 'mclk' is the controller clock and 'hclk' is the bus clock. Signed-off-by: bui duc phuc Link: https://patch.msgid.link/20260602101608.45137-2-phucduc.bui@gmail.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/rockchip-spdif.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/sound/rockchip-spdif.yaml b/Documentation/devicetree/bindings/sound/rockchip-spdif.yaml index 502907dd28b3..b174d7498029 100644 --- a/Documentation/devicetree/bindings/sound/rockchip-spdif.yaml +++ b/Documentation/devicetree/bindings/sound/rockchip-spdif.yaml @@ -45,8 +45,8 @@ properties: clocks: items: - - description: clock for SPDIF bus - description: clock for SPDIF controller + - description: clock for SPDIF bus clock-names: items: From 74d3f01a90ca0e49cf4b1980e7b0a07bcf18f064 Mon Sep 17 00:00:00 2001 From: bui duc phuc Date: Tue, 2 Jun 2026 17:16:05 +0700 Subject: [PATCH 2/5] ASoC: rockchip: spdif: Reorder clock enable sequence Enable the 'hclk' bus clock before the 'mclk' controller clock during runtime resume. The bus clock provides the register access interface, so enable it before the controller clock. This also makes the resume sequence the reverse of the suspend sequence, which keeps the clock ordering consistent. Signed-off-by: bui duc phuc Link: https://patch.msgid.link/20260602101608.45137-3-phucduc.bui@gmail.com Signed-off-by: Mark Brown --- sound/soc/rockchip/rockchip_spdif.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/sound/soc/rockchip/rockchip_spdif.c b/sound/soc/rockchip/rockchip_spdif.c index 581624f2682e..8de5b76cfe79 100644 --- a/sound/soc/rockchip/rockchip_spdif.c +++ b/sound/soc/rockchip/rockchip_spdif.c @@ -76,16 +76,16 @@ static int rk_spdif_runtime_resume(struct device *dev) struct rk_spdif_dev *spdif = dev_get_drvdata(dev); int ret; - ret = clk_prepare_enable(spdif->mclk); + ret = clk_prepare_enable(spdif->hclk); if (ret) { - dev_err(spdif->dev, "mclk clock enable failed %d\n", ret); + dev_err(spdif->dev, "hclk clock enable failed %d\n", ret); return ret; } - ret = clk_prepare_enable(spdif->hclk); + ret = clk_prepare_enable(spdif->mclk); if (ret) { - clk_disable_unprepare(spdif->mclk); - dev_err(spdif->dev, "hclk clock enable failed %d\n", ret); + clk_disable_unprepare(spdif->hclk); + dev_err(spdif->dev, "mclk clock enable failed %d\n", ret); return ret; } From 3168721d6ec3b610edf6a3c22ad190722a27d276 Mon Sep 17 00:00:00 2001 From: bui duc phuc Date: Tue, 2 Jun 2026 17:16:06 +0700 Subject: [PATCH 3/5] ASoC: rockchip: rockchip_pdm: Reorder clock enable sequence Enable the 'hclk' bus clock before the 'clk' controller clock during runtime resume. The bus clock provides the register access interface, so enable it before the controller clock. This also makes the resume sequence the reverse of the suspend sequence, which keeps the clock ordering consistent. Signed-off-by: bui duc phuc Link: https://patch.msgid.link/20260602101608.45137-4-phucduc.bui@gmail.com Signed-off-by: Mark Brown --- sound/soc/rockchip/rockchip_pdm.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/sound/soc/rockchip/rockchip_pdm.c b/sound/soc/rockchip/rockchip_pdm.c index c69cdd6f2499..8f78f7bc1806 100644 --- a/sound/soc/rockchip/rockchip_pdm.c +++ b/sound/soc/rockchip/rockchip_pdm.c @@ -422,16 +422,16 @@ static int rockchip_pdm_runtime_resume(struct device *dev) struct rk_pdm_dev *pdm = dev_get_drvdata(dev); int ret; - ret = clk_prepare_enable(pdm->clk); + ret = clk_prepare_enable(pdm->hclk); if (ret) { - dev_err(pdm->dev, "clock enable failed %d\n", ret); + dev_err(pdm->dev, "hclock enable failed %d\n", ret); return ret; } - ret = clk_prepare_enable(pdm->hclk); + ret = clk_prepare_enable(pdm->clk); if (ret) { - clk_disable_unprepare(pdm->clk); - dev_err(pdm->dev, "hclock enable failed %d\n", ret); + clk_disable_unprepare(pdm->hclk); + dev_err(pdm->dev, "clock enable failed %d\n", ret); return ret; } From 3546e9aa691ac981e4734fedd1646d0180784893 Mon Sep 17 00:00:00 2001 From: bui duc phuc Date: Tue, 2 Jun 2026 17:16:07 +0700 Subject: [PATCH 4/5] ASoC: rockchip: spdif: Restore regcache cache-only mode on sync failure If regcache_sync() fails during runtime resume, the driver disables the clocks and returns an error. However, the regmap cache-only mode is left disabled. Restore cache-only mode in the error path so subsequent register accesses continue to use the cache while the device is inactive. Reported-by: Sashiko AI Review Closes: https://lore.kernel.org/all/20260522103713.6C09D1F000E9@smtp.kernel.org/ Signed-off-by: bui duc phuc Link: https://patch.msgid.link/20260602101608.45137-5-phucduc.bui@gmail.com Signed-off-by: Mark Brown --- sound/soc/rockchip/rockchip_spdif.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/rockchip/rockchip_spdif.c b/sound/soc/rockchip/rockchip_spdif.c index 8de5b76cfe79..7f15bc7f8f35 100644 --- a/sound/soc/rockchip/rockchip_spdif.c +++ b/sound/soc/rockchip/rockchip_spdif.c @@ -94,6 +94,7 @@ static int rk_spdif_runtime_resume(struct device *dev) ret = regcache_sync(spdif->regmap); if (ret) { + regcache_cache_only(spdif->regmap, true); clk_disable_unprepare(spdif->mclk); clk_disable_unprepare(spdif->hclk); } From ee7b5f7b39332febf917f9ebf212842cc9379815 Mon Sep 17 00:00:00 2001 From: bui duc phuc Date: Tue, 2 Jun 2026 17:16:08 +0700 Subject: [PATCH 5/5] ASoC: rockchip: rockchip_pdm: Handle runtime PM resume failures in set_fmt rockchip_pdm_set_fmt() calls pm_runtime_get_sync() before accessing hardware registers, but ignores its return value. If the runtime resume fails, the function continues to perform register accesses while the device state is undefined. Replace pm_runtime_get_sync() with pm_runtime_resume_and_get() and return early on failure to avoid unpowered register accesses. Reported-by: Sashiko AI Review Closes: https://lore.kernel.org/all/20260522110302.349421F000E9@smtp.kernel.org/ Signed-off-by: bui duc phuc Link: https://patch.msgid.link/20260602101608.45137-6-phucduc.bui@gmail.com Signed-off-by: Mark Brown --- sound/soc/rockchip/rockchip_pdm.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/sound/soc/rockchip/rockchip_pdm.c b/sound/soc/rockchip/rockchip_pdm.c index 8f78f7bc1806..115e90d3bbfe 100644 --- a/sound/soc/rockchip/rockchip_pdm.c +++ b/sound/soc/rockchip/rockchip_pdm.c @@ -321,6 +321,7 @@ static int rockchip_pdm_set_fmt(struct snd_soc_dai *cpu_dai, { struct rk_pdm_dev *pdm = to_info(cpu_dai); unsigned int mask = 0, val = 0; + int ret; mask = PDM_CKP_MSK; switch (fmt & SND_SOC_DAIFMT_INV_MASK) { @@ -334,7 +335,10 @@ static int rockchip_pdm_set_fmt(struct snd_soc_dai *cpu_dai, return -EINVAL; } - pm_runtime_get_sync(cpu_dai->dev); + ret = pm_runtime_resume_and_get(cpu_dai->dev); + if (ret) + return ret; + regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, mask, val); pm_runtime_put(cpu_dai->dev);