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dt-bindings: host1x: Document OPP and power domain properties
Document new DVFS OPP table and power domain properties of the Host1x bus and devices sitting on the bus. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Dmitry Osipenko
Thierry Reding
parent
d0e70d1304
commit
425a68a963
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@ -20,6 +20,18 @@ Required properties:
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- reset-names: Must include the following entries:
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- host1x
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Optional properties:
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- operating-points-v2: See ../bindings/opp/opp.txt for details.
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- power-domains: Phandle to HEG or core power domain.
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For each opp entry in 'operating-points-v2' table of host1x and its modules:
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- opp-supported-hw: One bitfield indicating:
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On Tegra20: SoC process ID mask
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On Tegra30+: SoC speedo ID mask
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A bitwise AND is performed against the value and if any bit
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matches, the OPP gets enabled.
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Each host1x client module having to perform DMA through the Memory Controller
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should have the interconnect endpoints set to the Memory Client and External
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Memory respectively.
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@ -45,6 +57,8 @@ of the following host1x client modules:
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- interconnect-names: Must include name of the interconnect path for each
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interconnect entry. Consult TRM documentation for information about
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available memory clients, see MEMORY CONTROLLER section.
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- operating-points-v2: See ../bindings/opp/opp.txt for details.
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- power-domains: Phandle to MPE power domain.
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- vi: video input
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@ -128,6 +142,8 @@ of the following host1x client modules:
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- interconnect-names: Must include name of the interconnect path for each
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interconnect entry. Consult TRM documentation for information about
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available memory clients, see MEMORY CONTROLLER section.
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- operating-points-v2: See ../bindings/opp/opp.txt for details.
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- power-domains: Phandle to VENC power domain.
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- epp: encoder pre-processor
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@ -147,6 +163,8 @@ of the following host1x client modules:
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- interconnect-names: Must include name of the interconnect path for each
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interconnect entry. Consult TRM documentation for information about
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available memory clients, see MEMORY CONTROLLER section.
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- operating-points-v2: See ../bindings/opp/opp.txt for details.
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- power-domains: Phandle to HEG or core power domain.
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- isp: image signal processor
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@ -166,6 +184,7 @@ of the following host1x client modules:
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- interconnect-names: Must include name of the interconnect path for each
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interconnect entry. Consult TRM documentation for information about
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available memory clients, see MEMORY CONTROLLER section.
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- power-domains: Phandle to VENC or core power domain.
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- gr2d: 2D graphics engine
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@ -185,6 +204,8 @@ of the following host1x client modules:
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- interconnect-names: Must include name of the interconnect path for each
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interconnect entry. Consult TRM documentation for information about
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available memory clients, see MEMORY CONTROLLER section.
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- operating-points-v2: See ../bindings/opp/opp.txt for details.
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- power-domains: Phandle to HEG or core power domain.
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- gr3d: 3D graphics engine
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@ -209,6 +230,8 @@ of the following host1x client modules:
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- interconnect-names: Must include name of the interconnect path for each
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interconnect entry. Consult TRM documentation for information about
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available memory clients, see MEMORY CONTROLLER section.
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- operating-points-v2: See ../bindings/opp/opp.txt for details.
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- power-domains: Phandles to 3D or core power domain.
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- dc: display controller
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@ -241,6 +264,8 @@ of the following host1x client modules:
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- interconnect-names: Must include name of the interconnect path for each
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interconnect entry. Consult TRM documentation for information about
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available memory clients, see MEMORY CONTROLLER section.
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- operating-points-v2: See ../bindings/opp/opp.txt for details.
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- power-domains: Phandle to core power domain.
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- hdmi: High Definition Multimedia Interface
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@ -267,6 +292,7 @@ of the following host1x client modules:
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- nvidia,hpd-gpio: specifies a GPIO used for hotplug detection
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- nvidia,edid: supplies a binary EDID blob
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- nvidia,panel: phandle of a display panel
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- operating-points-v2: See ../bindings/opp/opp.txt for details.
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- tvo: TV encoder output
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@ -277,6 +303,10 @@ of the following host1x client modules:
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- clocks: Must contain one entry, for the module clock.
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See ../clocks/clock-bindings.txt for details.
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Optional properties:
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- operating-points-v2: See ../bindings/opp/opp.txt for details.
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- power-domains: Phandle to core power domain.
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- dsi: display serial interface
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Required properties:
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@ -305,6 +335,7 @@ of the following host1x client modules:
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- nvidia,panel: phandle of a display panel
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- nvidia,ganged-mode: contains a phandle to a second DSI controller to gang
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up with in order to support up to 8 data lanes
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- operating-points-v2: See ../bindings/opp/opp.txt for details.
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- sor: serial output resource
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@ -408,6 +439,8 @@ Example:
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clocks = <&tegra_car TEGRA20_CLK_HOST1X>;
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resets = <&tegra_car 28>;
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reset-names = "host1x";
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operating-points-v2 = <&dvfs_opp_table>;
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power-domains = <&domain>;
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#address-cells = <1>;
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#size-cells = <1>;
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@ -421,6 +454,8 @@ Example:
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clocks = <&tegra_car TEGRA20_CLK_MPE>;
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resets = <&tegra_car 60>;
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reset-names = "mpe";
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operating-points-v2 = <&dvfs_opp_table>;
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power-domains = <&domain>;
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};
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vi@54080000 {
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@ -429,6 +464,7 @@ Example:
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interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
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assigned-clocks = <&tegra_car TEGRA210_CLK_VI>;
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assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>;
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operating-points-v2 = <&dvfs_opp_table>;
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clocks = <&tegra_car TEGRA210_CLK_VI>;
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power-domains = <&pd_venc>;
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@ -510,6 +546,8 @@ Example:
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clocks = <&tegra_car TEGRA20_CLK_EPP>;
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resets = <&tegra_car 19>;
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reset-names = "epp";
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operating-points-v2 = <&dvfs_opp_table>;
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power-domains = <&domain>;
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};
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isp {
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@ -528,6 +566,8 @@ Example:
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clocks = <&tegra_car TEGRA20_CLK_GR2D>;
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resets = <&tegra_car 21>;
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reset-names = "2d";
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operating-points-v2 = <&dvfs_opp_table>;
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power-domains = <&domain>;
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};
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gr3d {
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@ -536,6 +576,8 @@ Example:
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clocks = <&tegra_car TEGRA20_CLK_GR3D>;
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resets = <&tegra_car 24>;
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reset-names = "3d";
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operating-points-v2 = <&dvfs_opp_table>;
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power-domains = <&domain>;
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};
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dc@54200000 {
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@ -547,6 +589,8 @@ Example:
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clock-names = "dc", "parent";
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resets = <&tegra_car 27>;
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reset-names = "dc";
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operating-points-v2 = <&dvfs_opp_table>;
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power-domains = <&domain>;
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interconnects = <&mc TEGRA20_MC_DISPLAY0A &emc>,
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<&mc TEGRA20_MC_DISPLAY0B &emc>,
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@ -571,6 +615,8 @@ Example:
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clock-names = "dc", "parent";
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resets = <&tegra_car 26>;
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reset-names = "dc";
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operating-points-v2 = <&dvfs_opp_table>;
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power-domains = <&domain>;
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interconnects = <&mc TEGRA20_MC_DISPLAY0AB &emc>,
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<&mc TEGRA20_MC_DISPLAY0BB &emc>,
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@ -596,6 +642,7 @@ Example:
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resets = <&tegra_car 51>;
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reset-names = "hdmi";
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status = "disabled";
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operating-points-v2 = <&dvfs_opp_table>;
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};
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tvo {
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@ -604,6 +651,7 @@ Example:
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interrupts = <0 76 0x04>;
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clocks = <&tegra_car TEGRA20_CLK_TVO>;
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status = "disabled";
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operating-points-v2 = <&dvfs_opp_table>;
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};
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dsi {
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@ -615,6 +663,7 @@ Example:
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resets = <&tegra_car 48>;
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reset-names = "dsi";
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status = "disabled";
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operating-points-v2 = <&dvfs_opp_table>;
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};
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};
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